--- v1
+++ v6
@@ -1,41 +1,57 @@
-It'd be safer to enable both FIFOs for TX or RX at the same time.
+The _fsl_ssi_set_dai_fmt() bypasses an undefined format for AC97
+mode. However, it's not really necessary if AC97 has its complete
+format defined.
+
+So this patch adds a DAIFMT macro of complete format including a
+clock direction and polarity.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
+Tested-by: Caleb Crome <caleb@crome.org>
+Tested-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
+Reviewed-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
---
- sound/soc/fsl/fsl_ssi.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
+ sound/soc/fsl/fsl_ssi.c | 15 ++++++++++++---
+ 1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
-index 64a0d33..b51591e 100644
+index 9f024a9..fc5768d 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
-@@ -581,6 +581,11 @@ static void fsl_ssi_setup_regvals(struct fsl_ssi *ssi)
- if (fsl_ssi_is_ac97(ssi))
- vals[RX].scr = vals[TX].scr = 0;
+@@ -90,6 +90,16 @@
+ SNDRV_PCM_FMTBIT_S24_LE)
+ #endif
-+ if (ssi->use_dual_fifo) {
-+ vals[RX].srcr |= SSI_SRCR_RFEN1;
-+ vals[TX].stcr |= SSI_STCR_TFEN1;
-+ }
++/*
++ * In AC97 mode, TXDIR bit is forced to 0 and TFDIR bit is forced to 1:
++ * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
++ * - Also have NB_NF to mark these two clocks will not be inverted
++ */
++#define FSLSSI_AC97_DAIFMT \
++ (SND_SOC_DAIFMT_AC97 | \
++ SND_SOC_DAIFMT_CBM_CFS | \
++ SND_SOC_DAIFMT_NB_NF)
+
- if (ssi->use_dma) {
- vals[RX].sier |= SSI_SIER_RDMAE;
- vals[TX].sier |= SSI_SIER_TDMAE;
-@@ -981,14 +986,9 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev,
- SSI_SFCSR_TFWM0(wm) | SSI_SFCSR_RFWM0(wm) |
- SSI_SFCSR_TFWM1(wm) | SSI_SFCSR_RFWM1(wm));
+ #define FSLSSI_SIER_DBG_RX_FLAGS \
+ (SSI_SIER_RFF0_EN | \
+ SSI_SIER_RLS_EN | \
+@@ -964,8 +974,7 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev,
+ scr &= ~SSI_SCR_SYS_CLK_EN;
+ break;
+ default:
+- if (!fsl_ssi_is_ac97(ssi))
+- return -EINVAL;
++ return -EINVAL;
+ }
-- if (ssi->use_dual_fifo) {
-- regmap_update_bits(regs, REG_SSI_SRCR,
-- SSI_SRCR_RFEN1, SSI_SRCR_RFEN1);
-- regmap_update_bits(regs, REG_SSI_STCR,
-- SSI_STCR_TFEN1, SSI_STCR_TFEN1);
-+ if (ssi->use_dual_fifo)
- regmap_update_bits(regs, REG_SSI_SCR,
- SSI_SCR_TCH_EN, SSI_SCR_TCH_EN);
-- }
+ stcr |= strcr;
+@@ -1372,7 +1381,7 @@ static int fsl_ssi_probe(struct platform_device *pdev)
+ sprop = of_get_property(np, "fsl,mode", NULL);
+ if (sprop) {
+ if (!strcmp(sprop, "ac97-slave"))
+- ssi->dai_fmt = SND_SOC_DAIFMT_AC97;
++ ssi->dai_fmt = FSLSSI_AC97_DAIFMT;
+ }
- if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_AC97)
- fsl_ssi_setup_ac97(ssi);
+ /* Select DMA or FIQ */
--
-2.7.4
+2.1.4