Inter-revision diff: patch 5

Comparing v1 (message) to v3 (message)

--- v1
+++ v3
@@ -1,84 +1,84 @@
-Move idle related macros to a common location asm/cpuidle.h so that
-they can be used for stop instruction support.
+Create a function for saving SPRs before entering deep idle states.
+This function can be reused for POWER9 deep idle states.
 
-Signed-off-by: Shreyas B. Prabhy <shreyas@linux.vnet.ibm.com>
+Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
 ---
- arch/powerpc/include/asm/cpuidle.h | 27 +++++++++++++++++++++++++++
- arch/powerpc/kernel/idle_power7.S  | 26 --------------------------
- 2 files changed, 27 insertions(+), 26 deletions(-)
+New in v3
 
-diff --git a/arch/powerpc/include/asm/cpuidle.h b/arch/powerpc/include/asm/cpuidle.h
-index d2f99ca..faa97b7 100644
---- a/arch/powerpc/include/asm/cpuidle.h
-+++ b/arch/powerpc/include/asm/cpuidle.h
-@@ -17,4 +17,31 @@ extern u32 pnv_fastsleep_workaround_at_exit[];
- 
- #endif
- 
-+/* Idle state entry routines */
-+#ifdef CONFIG_PPC_P7_NAP
-+#define	IDLE_STATE_ENTER_SEQ(IDLE_INST)				\
-+	/* Magic NAP/SLEEP/WINKLE mode enter sequence */	\
-+	std	r0,0(r1);					\
-+	ptesync;						\
-+	ld	r0,0(r1);					\
-+1:	cmp	cr0,r0,r0;					\
-+	bne	1b;						\
-+	IDLE_INST;						\
-+	b	.
-+#endif /* CONFIG_PPC_P7_NAP */
-+
-+/*
-+ * Use unused space in the interrupt stack to save and restore
-+ * registers for deep-idle support.
-+ */
-+#define _SDR1	GPR3
-+#define _RPR	GPR4
-+#define _SPURR	GPR5
-+#define _PURR	GPR6
-+#define _TSCR	GPR7
-+#define _DSCR	GPR8
-+#define _AMOR	GPR9
-+#define _WORT	GPR10
-+#define _WORC	GPR11
-+
- #endif
-diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
-index 1ea71d4..6a24769 100644
---- a/arch/powerpc/kernel/idle_power7.S
-+++ b/arch/powerpc/kernel/idle_power7.S
-@@ -24,32 +24,6 @@
- 
- #undef DEBUG
- 
--/*
-- * Use unused space in the interrupt stack to save and restore
-- * registers for winkle support.
-- */
--#define _SDR1	GPR3
--#define _RPR	GPR4
--#define _SPURR	GPR5
--#define _PURR	GPR6
--#define _TSCR	GPR7
--#define _DSCR	GPR8
--#define _AMOR	GPR9
--#define _WORT	GPR10
--#define _WORC	GPR11
--
--/* Idle state entry routines */
--
--#define	IDLE_STATE_ENTER_SEQ(IDLE_INST)				\
--	/* Magic NAP/SLEEP/WINKLE mode enter sequence */	\
--	std	r0,0(r1);					\
--	ptesync;						\
--	ld	r0,0(r1);					\
--1:	cmp	cr0,r0,r0;					\
--	bne	1b;						\
--	IDLE_INST;						\
--	b	.
--
+ arch/powerpc/kernel/idle_power_common.S | 54 +++++++++++++++++++--------------
+ 1 file changed, 32 insertions(+), 22 deletions(-)
+
+diff --git a/arch/powerpc/kernel/idle_power_common.S b/arch/powerpc/kernel/idle_power_common.S
+index d100577..d931537 100644
+--- a/arch/powerpc/kernel/idle_power_common.S
++++ b/arch/powerpc/kernel/idle_power_common.S
+@@ -52,6 +52,36 @@
  	.text
  
  /*
++ * Used by threads before entering deep idle states. Saves SPRs
++ * in interrupt stack frame
++ */
++save_sprs_to_stack:
++	/*
++	 * Note all register i.e per-core, per-subcore or per-thread is saved
++	 * here since any thread in the core might wake up first
++	 */
++	mfspr	r3,SPRN_SDR1
++	std	r3,_SDR1(r1)
++	mfspr	r3,SPRN_RPR
++	std	r3,_RPR(r1)
++	mfspr	r3,SPRN_SPURR
++	std	r3,_SPURR(r1)
++	mfspr	r3,SPRN_PURR
++	std	r3,_PURR(r1)
++	mfspr	r3,SPRN_TSCR
++	std	r3,_TSCR(r1)
++	mfspr	r3,SPRN_DSCR
++	std	r3,_DSCR(r1)
++	mfspr	r3,SPRN_AMOR
++	std	r3,_AMOR(r1)
++	mfspr	r3,SPRN_WORT
++	std	r3,_WORT(r1)
++	mfspr	r3,SPRN_WORC
++	std	r3,_WORC(r1)
++
++	blr
++
++/*
+  * Used by threads when the lock bit of core_idle_state is set.
+  * Threads will spin in HMT_LOW until the lock bit is cleared.
+  * r14 - pointer to core_idle_state
+@@ -207,28 +237,8 @@ fastsleep_workaround_at_entry:
+ 	b	common_enter
+ 
+ enter_winkle:
+-	/*
+-	 * Note all register i.e per-core, per-subcore or per-thread is saved
+-	 * here since any thread in the core might wake up first
+-	 */
+-	mfspr	r3,SPRN_SDR1
+-	std	r3,_SDR1(r1)
+-	mfspr	r3,SPRN_RPR
+-	std	r3,_RPR(r1)
+-	mfspr	r3,SPRN_SPURR
+-	std	r3,_SPURR(r1)
+-	mfspr	r3,SPRN_PURR
+-	std	r3,_PURR(r1)
+-	mfspr	r3,SPRN_TSCR
+-	std	r3,_TSCR(r1)
+-	mfspr	r3,SPRN_DSCR
+-	std	r3,_DSCR(r1)
+-	mfspr	r3,SPRN_AMOR
+-	std	r3,_AMOR(r1)
+-	mfspr	r3,SPRN_WORT
+-	std	r3,_WORT(r1)
+-	mfspr	r3,SPRN_WORC
+-	std	r3,_WORC(r1)
++	bl	save_sprs_to_stack
++
+ 	IDLE_STATE_ENTER_SEQ(PPC_WINKLE)
+ 
+ _GLOBAL(power7_idle)
 -- 
-2.1.4
+2.4.11
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