--- v4
+++ v7
@@ -1,6 +1,6 @@
-This changes few functions to receive a powerpc_iommu pointer
+This changes few functions to receive a iommu_table_group pointer
rather than PE as they are going to be a part of upcoming
-powerpc_iommu_ops callback set.
+iommu_table_group_ops callback set.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
@@ -8,37 +8,37 @@
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
-index f542819..29bd7a4 100644
+index 74e119c..80ea84d 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
-@@ -1360,10 +1360,12 @@ static __be64 *pnv_alloc_tce_table(int nid,
+@@ -1408,10 +1408,12 @@ static __be64 *pnv_alloc_tce_table(int nid,
return addr;
}
-static long pnv_pci_ioda2_create_table(struct pnv_ioda_pe *pe,
-+static long pnv_pci_ioda2_create_table(struct powerpc_iommu *iommu,
- __u32 page_shift, __u32 window_shift, __u32 levels,
++static long pnv_pci_ioda2_create_table(struct iommu_table_group *table_group,
+ __u32 page_shift, __u64 window_size, __u32 levels,
struct iommu_table *tbl)
{
-+ struct pnv_ioda_pe *pe = container_of(iommu, struct pnv_ioda_pe,
-+ iommu);
++ struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe,
++ table_group);
int nid = pe->phb->hose->node;
void *addr;
unsigned long tce_table_size, left;
-@@ -1419,9 +1421,11 @@ static void pnv_pci_ioda2_free_table(struct iommu_table *tbl)
+@@ -1462,9 +1464,11 @@ static void pnv_pci_free_table(struct iommu_table *tbl)
iommu_reset_table(tbl, "ioda2");
}
-static long pnv_pci_ioda2_set_window(struct pnv_ioda_pe *pe,
-+static long pnv_pci_ioda2_set_window(struct powerpc_iommu *iommu,
++static long pnv_pci_ioda2_set_window(struct iommu_table_group *table_group,
struct iommu_table *tbl)
{
-+ struct pnv_ioda_pe *pe = container_of(iommu, struct pnv_ioda_pe,
-+ iommu);
++ struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe,
++ table_group);
struct pnv_phb *phb = pe->phb;
const __be64 *swinvp;
int64_t rc;
-@@ -1554,12 +1558,11 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
+@@ -1599,12 +1603,11 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
/* The PE will reserve all possible 32-bits space */
pe->tce32_seg = 0;
@@ -48,16 +48,16 @@
end);
- rc = pnv_pci_ioda2_create_table(pe, IOMMU_PAGE_SHIFT_4K,
-+ rc = pnv_pci_ioda2_create_table(&pe->iommu, IOMMU_PAGE_SHIFT_4K,
- ilog2(phb->ioda.m32_pci_base),
- POWERPC_IOMMU_DEFAULT_LEVELS, tbl);
++ rc = pnv_pci_ioda2_create_table(&pe->table_group, IOMMU_PAGE_SHIFT_4K,
+ phb->ioda.m32_pci_base,
+ POWERNV_IOMMU_DEFAULT_LEVELS, tbl);
if (rc) {
-@@ -1571,7 +1574,7 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
- pe->iommu.tables[0].it_iommu = &pe->iommu;
- pe->iommu.ops = &pnv_pci_ioda2_ops;
+@@ -1619,7 +1622,7 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
+ pe->table_group.ops = &pnv_pci_ioda2_ops;
+ #endif
- rc = pnv_pci_ioda2_set_window(pe, tbl);
-+ rc = pnv_pci_ioda2_set_window(&pe->iommu, tbl);
++ rc = pnv_pci_ioda2_set_window(&pe->table_group, tbl);
if (rc) {
pe_err(pe, "Failed to configure 32-bit TCE table,"
" err %ld\n", rc);