--- v3
+++ v12
@@ -1,132 +1,87 @@
-iommu_take_ownership/iommu_release_ownership used to be used to mark
-bits in iommu_table::it_map. Since the IOMMU tables are recreated for
-VFIO, it_map is always NULL.
+This replaces direct accesses to TCE table with a helper which
+returns an TCE entry address. This does not make difference now but will
+when multi-level TCE tables get introduces.
+
+No change in behavior is expected.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
+Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
+Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
---
- arch/powerpc/include/asm/iommu.h | 2 -
- arch/powerpc/kernel/iommu.c | 96 ----------------------------------------
- 2 files changed, 98 deletions(-)
+Changes:
+v9:
+* new patch in the series to separate this mechanical change from
+functional changes; this is not right before
+"powerpc/powernv: Implement multilevel TCE tables" but here in order
+to let the next patch - "powerpc/iommu/powernv: Release replaced TCE" -
+use pnv_tce() and avoid changing the same code twice
+---
+ arch/powerpc/platforms/powernv/pci.c | 34 +++++++++++++++++++++-------------
+ 1 file changed, 21 insertions(+), 13 deletions(-)
-diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
-index 8393822..33009f9 100644
---- a/arch/powerpc/include/asm/iommu.h
-+++ b/arch/powerpc/include/asm/iommu.h
-@@ -272,8 +272,6 @@ extern long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry,
- enum dma_data_direction direction);
+diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
+index 4b4c583..b2a32d0 100644
+--- a/arch/powerpc/platforms/powernv/pci.c
++++ b/arch/powerpc/platforms/powernv/pci.c
+@@ -572,38 +572,46 @@ struct pci_ops pnv_pci_ops = {
+ .write = pnv_pci_write_config,
+ };
- extern void iommu_flush_tce(struct iommu_table *tbl);
--extern int iommu_take_ownership(struct powerpc_iommu *iommu);
--extern void iommu_release_ownership(struct powerpc_iommu *iommu);
++static __be64 *pnv_tce(struct iommu_table *tbl, long idx)
++{
++ __be64 *tmp = ((__be64 *)tbl->it_base);
++
++ return tmp + idx;
++}
++
+ int pnv_tce_build(struct iommu_table *tbl, long index, long npages,
+ unsigned long uaddr, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
+ {
+ u64 proto_tce = iommu_direction_to_tce_perm(direction);
+- __be64 *tcep;
+- u64 rpn;
++ u64 rpn = __pa(uaddr) >> tbl->it_page_shift;
++ long i;
- #endif /* __KERNEL__ */
- #endif /* _ASM_IOMMU_H */
-diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
-index 5f87076..6987115 100644
---- a/arch/powerpc/kernel/iommu.c
-+++ b/arch/powerpc/kernel/iommu.c
-@@ -1007,102 +1007,6 @@ long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry,
+- tcep = ((__be64 *)tbl->it_base) + index - tbl->it_offset;
+- rpn = __pa(uaddr) >> tbl->it_page_shift;
+-
+- while (npages--)
+- *(tcep++) = cpu_to_be64(proto_tce |
+- (rpn++ << tbl->it_page_shift));
++ for (i = 0; i < npages; i++) {
++ unsigned long newtce = proto_tce |
++ ((rpn + i) << tbl->it_page_shift);
++ unsigned long idx = index - tbl->it_offset + i;
+
++ *(pnv_tce(tbl, idx)) = cpu_to_be64(newtce);
++ }
+
+ return 0;
}
- EXPORT_SYMBOL_GPL(iommu_tce_xchg);
--static int iommu_table_take_ownership(struct iommu_table *tbl)
--{
-- unsigned long flags, i, sz = (tbl->it_size + 7) >> 3;
-- int ret = 0;
--
-- /*
-- * VFIO does not control TCE entries allocation and the guest
-- * can write new TCEs on top of existing ones so iommu_tce_build()
-- * must be able to release old pages. This functionality
-- * requires exchange() callback defined so if it is not
-- * implemented, we disallow taking ownership over the table.
-- */
-- if (!tbl->it_ops->exchange)
-- return -EINVAL;
--
-- spin_lock_irqsave(&tbl->large_pool.lock, flags);
-- for (i = 0; i < tbl->nr_pools; i++)
-- spin_lock(&tbl->pools[i].lock);
--
-- if (tbl->it_offset == 0)
-- clear_bit(0, tbl->it_map);
--
-- if (!bitmap_empty(tbl->it_map, tbl->it_size)) {
-- pr_err("iommu_tce: it_map is not empty");
-- ret = -EBUSY;
-- if (tbl->it_offset == 0)
-- set_bit(0, tbl->it_map);
-- } else {
-- memset(tbl->it_map, 0xff, sz);
-- }
--
-- for (i = 0; i < tbl->nr_pools; i++)
-- spin_unlock(&tbl->pools[i].lock);
-- spin_unlock_irqrestore(&tbl->large_pool.lock, flags);
--
-- return 0;
--}
--
--static void iommu_table_release_ownership(struct iommu_table *tbl);
--
--int iommu_take_ownership(struct powerpc_iommu *iommu)
--{
-- int i, j, rc = 0;
--
-- for (i = 0; i < POWERPC_IOMMU_MAX_TABLES; ++i) {
-- struct iommu_table *tbl = &iommu->tables[i];
--
-- if (!tbl->it_map)
-- continue;
--
-- rc = iommu_table_take_ownership(tbl);
-- if (rc) {
-- for (j = 0; j < i; ++j)
-- iommu_table_release_ownership(
-- &iommu->tables[j]);
--
-- return rc;
-- }
-- }
--
-- return 0;
--}
--EXPORT_SYMBOL_GPL(iommu_take_ownership);
--
--static void iommu_table_release_ownership(struct iommu_table *tbl)
--{
-- unsigned long flags, i, sz = (tbl->it_size + 7) >> 3;
--
-- spin_lock_irqsave(&tbl->large_pool.lock, flags);
-- for (i = 0; i < tbl->nr_pools; i++)
-- spin_lock(&tbl->pools[i].lock);
--
-- memset(tbl->it_map, 0, sz);
--
-- /* Restore bit#0 set by iommu_init_table() */
-- if (tbl->it_offset == 0)
-- set_bit(0, tbl->it_map);
--
-- for (i = 0; i < tbl->nr_pools; i++)
-- spin_unlock(&tbl->pools[i].lock);
-- spin_unlock_irqrestore(&tbl->large_pool.lock, flags);
--}
--
--extern void iommu_release_ownership(struct powerpc_iommu *iommu)
--{
-- int i;
--
-- for (i = 0; i < POWERPC_IOMMU_MAX_TABLES; ++i) {
-- struct iommu_table *tbl = &iommu->tables[i];
--
-- if (tbl->it_map)
-- iommu_table_release_ownership(tbl);
-- }
--}
--EXPORT_SYMBOL_GPL(iommu_release_ownership);
--
- int iommu_add_device(struct device *dev)
+ void pnv_tce_free(struct iommu_table *tbl, long index, long npages)
{
- struct iommu_table *tbl;
+- __be64 *tcep;
++ long i;
+
+- tcep = ((__be64 *)tbl->it_base) + index - tbl->it_offset;
++ for (i = 0; i < npages; i++) {
++ unsigned long idx = index - tbl->it_offset + i;
+
+- while (npages--)
+- *(tcep++) = cpu_to_be64(0);
++ *(pnv_tce(tbl, idx)) = cpu_to_be64(0);
++ }
+ }
+
+ unsigned long pnv_tce_get(struct iommu_table *tbl, long index)
+ {
+- return ((u64 *)tbl->it_base)[index - tbl->it_offset];
++ return *(pnv_tce(tbl, index - tbl->it_offset));
+ }
+
+ struct iommu_table *pnv_pci_table_alloc(int nid)
--
-2.0.0
+2.4.0.rc3.8.gfb3e7d5