--- v2
+++ v8
@@ -13,68 +13,137 @@
"senders", where the "receivers" are typically the NX engines and
"senders" are the kernel subsystems and user processors that wish to
access the receivers (NX engines). Once a sender is "connected" to
-a receiver through the switchboard, the sender submit compression/
+a receiver through the switchboard, the senders can submit compression/
encryption requests to the hardware using the new (PowerISA 3.0)
"copy" and "paste" instructions.
In the initial OPAL and PowerNV kernel patchsets, the "senders" can
-only be kernel subsystems (eg NX-842 driver). A follow-on patch set
-will allow senders to be user-space processes.
+only be kernel subsystems (eg NX-842 driver) and receivers can only
+be the NX-842 engine. Follow-on patch sets will allow senders/receivers
+to be user-space processes and receivers to be NX-GZIP engines.
-This kernel patch set configures the VAS subsystems and provides
-kernel interfaces to drivers like NX-842 to open receive and send
-windows in VAS and to submit requests to the NX engine.
+Provides:
-This patch set that has been tested in a Simics Power9 environment using
-a modified NX-842 kernel driver and a compression self-test module from
-Power8. The corresponding OPAL patchset for VAS support was posted to
-skiboot mailing list:
+ This kernel patch set configures the VAS subsystems and provides
+ kernel interfaces to drivers like NX-842 to open receive and send
+ windows in VAS and to submit compression requests to the NX engine.
- https://lists.ozlabs.org/pipermail/skiboot/2017-January/006193.html
-
-OPAL and kernel patchsets for NX-842 driver will be posted separately.
-All four patchsets are needed to effectively use VAS/NX in Power9.
+Requires:
+
+ This patch set needs corresponding VAS/NX skiboot patches which
+ were merged into skiboot tree. i.e skiboot must include:
+ commit b503dcf ("vas: Set mmio enable bits in DD2")
+
+Tests:
+ In-kernel compression requests were tested on DD1 and DD2 POWER9
+ hardware using compression self-test module and the following
+ NX-842 patch set from Haren Myneni:
+
+ https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-July/160620.html
+
+ and by dropping the last parameters to both vas_copy_crb() and
+ vas_paste_crb() calls in drivers/crypto/nx/nx-842-powernv.c.
+ See also PATCH 10/10.
+
+Git Tree:
+
+ https://github.com/sukadev/linux/
+ Branch: vas-kern-v8
Thanks to input from Ben Herrenschmidt, Michael Neuling, Michael Ellerman
and Haren Myneni.
+
+Changelog[v8]:
+ - [Michael Ellerman] Use kernel int types (u64, u32 etc); make VAS
+ a built-in rather than a module; drop unnecessary fields from
+ struct vas_instance; Update ISA references; use 0 or 1 with
+ SET_FIELD macros instead of bool; skip writing to SPARE registers;
+ minor cleanup of debug/error messages; retry if ida_get_new()
+ fails with EAGAIN; fix couple of leaks in ids in error handling;
+ drop vas_initialized() check; drop vas_win_id() and vas_paste_addr()
+ interfaces as they are not yet used; Set task_state() and fix
+ parameter to schedule_timeout(); Reuse existing copy/paste macros
+ drop unnecessary parameters and add cr0 to clobbers list
+
+Changelog[v7]:
+ - Drop support for user space send/receive FTW windows (will be
+ posted separately) Simplifies the rx-win-open interface a bit.
+ - [Michael Ellerman] Move GET_FIELD/SET_FIELD macros from
+ uapi/asm/vas.h to asm/vas.h.
+
+Changelog[v6]
+ - Add support for user space send/receive FTW windows
+ - Add a new, NX-FTW driver which provides the FTW user interface
+
+Changelog[v5]
+ - [Ben Herrenschmidt] Make VAS a platform device in the device tree
+ and use the core platform functions to parse the VAS properties.
+ Map the VAS MMIO regions as non-cachable and paste regions as
+ cachable. Use CONFIG_PPC_VAS rather than CONFIG_VAS; Don't assume
+ VAS ids are sequential.
+ - Copy the FIFO address as is into LFIFO_BAR (don't shift it).
+
+Changelog[v4]
+ Comments from Michael Neuling:
+ - Move VAS code from drivers/misc/vas to arch/powerpc/platforms/powernv
+ since VAS only provides interfaces to other drivers like NX-842.
+ - Drop vas-internal.h and use vas.h in separate dirs for VAS
+ internal, kernel API and user API
+ - Rather than create 6 separate device tree properties windows
+ and window context, combine them into 6 "reg" properties.
+ - Drop vas_window_reset() since windows are reset/cleared before
+ being assigned to kernel/users.
+ - Use ilog2() and radix_enabled() helpers
+
+Changelog[v3]
+ - Rebase to v4.11-rc1
+ - Add interfaces to initialize send/receive window attributes to
+ defaults that drivers can use (see arch/powerpc/include/asm/vas.h)
+ - Modify interface vas_paste() to return 0 or error code
+ - Fix a bug in setting Translation Control Mode (0b11 not 0x11)
+ - Enable send-window-credit checking
+ - Reorg code in vas_win_close()
+ - Minor reorgs and tweaks to register field settings to make it
+ easier to add support for user space windows.
+ - Skip writing to read-only registers
+ - Start window indexing from 0 rather than 1
Changelog[v2]
- Use vas-id, HVWC, UWC and paste address, entries from device tree
rather than defining/computing them in kernel and reorg code.
+
Sukadev Bhattiprolu (10):
- VAS: Define macros, register fields and structures
+ powerpc/vas: Define macros, register fields and structures
Move GET_FIELD/SET_FIELD to vas.h
- VAS: Define vas_init() and vas_exit()
- VAS: Define helpers for access MMIO regions
- VAS: Define helpers to init window context
- VAS: Define helpers to alloc/free windows
- VAS: Define vas_rx_win_open() interface
- VAS: Define vas_win_close() interface
- VAS: Define vas_tx_win_open()
- VAS: Define copy/paste interfaces
+ powerpc/vas: Define vas_init() and vas_exit()
+ powerpc/vas: Define helpers to access MMIO regions
+ powerpc/vas: Define helpers to init window context
+ powerpc/vas: Define helpers to alloc/free windows
+ powerpc/vas: Define vas_rx_win_open() interface
+ powerpc/vas: Define vas_win_close() interface
+ powerpc/vas: Define vas_tx_win_open()
+ powerpc/vas: Define copy/paste interfaces
- MAINTAINERS | 6 +
- arch/powerpc/include/asm/reg.h | 1 +
- arch/powerpc/include/asm/vas.h | 141 ++++++
- drivers/crypto/nx/nx-842-powernv.c | 1 +
- drivers/crypto/nx/nx-842.h | 5 -
- drivers/misc/Kconfig | 1 +
- drivers/misc/Makefile | 1 +
- drivers/misc/vas/Kconfig | 20 +
- drivers/misc/vas/Makefile | 3 +
- drivers/misc/vas/copy-paste.h | 74 +++
- drivers/misc/vas/vas-internal.h | 467 ++++++++++++++++++
- drivers/misc/vas/vas-window.c | 950 +++++++++++++++++++++++++++++++++++++
- drivers/misc/vas/vas.c | 156 ++++++
- 13 files changed, 1821 insertions(+), 5 deletions(-)
+ .../devicetree/bindings/powerpc/ibm,vas.txt | 23 +
+ MAINTAINERS | 9 +
+ arch/powerpc/include/asm/ppc-opcode.h | 2 +
+ arch/powerpc/include/asm/vas.h | 160 +++
+ arch/powerpc/platforms/powernv/Kconfig | 14 +
+ arch/powerpc/platforms/powernv/Makefile | 1 +
+ arch/powerpc/platforms/powernv/copy-paste.h | 46 +
+ arch/powerpc/platforms/powernv/vas-window.c | 1134 ++++++++++++++++++++
+ arch/powerpc/platforms/powernv/vas.c | 151 +++
+ arch/powerpc/platforms/powernv/vas.h | 467 ++++++++
+ drivers/crypto/nx/nx-842-powernv.c | 7 +-
+ drivers/crypto/nx/nx-842.h | 5 -
+ 12 files changed, 2011 insertions(+), 8 deletions(-)
+ create mode 100644 Documentation/devicetree/bindings/powerpc/ibm,vas.txt
create mode 100644 arch/powerpc/include/asm/vas.h
- create mode 100644 drivers/misc/vas/Kconfig
- create mode 100644 drivers/misc/vas/Makefile
- create mode 100644 drivers/misc/vas/copy-paste.h
- create mode 100644 drivers/misc/vas/vas-internal.h
- create mode 100644 drivers/misc/vas/vas-window.c
- create mode 100644 drivers/misc/vas/vas.c
+ create mode 100644 arch/powerpc/platforms/powernv/copy-paste.h
+ create mode 100644 arch/powerpc/platforms/powernv/vas-window.c
+ create mode 100644 arch/powerpc/platforms/powernv/vas.c
+ create mode 100644 arch/powerpc/platforms/powernv/vas.h
--
2.7.4