[PATCH v2] PCI/portdev: Disable AER for Titan Ridge 4C 2018

Changes since v1:
	Transferred logic to drivers/pci/quicks.c

Disable AER for Intel Titan Ridge 4C 2018
(used in T2 iMacs, where the warnings appear)
that generate continuous pcieport warnings. such as:

pcieport 0000:00:1c.4: AER: Correctable error message received from 0000:07:00.0
pcieport 0000:07:00.0: PCIe Bus Error: severity=Correctable, type=Data Link Layer, (Receiver ID)
pcieport 0000:07:00.0:   device [8086:15ea] error status/mask=00000080/00002000
pcieport 0000:07:00.0:    [ 7] BadDLLP

(see: https://bugzilla.kernel.org/show_bug.cgi?id=220651)

macOS also disables AER for Thunderbolt devices and controllers in their drivers.

Signed-off-by: Atharva Tiwari <redacted>
---
 drivers/pci/pcie/aer.c     | 3 +++
 drivers/pci/pcie/portdrv.c | 2 +-
 drivers/pci/quirks.c       | 9 +++++++++
 include/linux/pci.h        | 1 +
 4 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index e0bcaa896803..45604564ce6f 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c

@@ -389,6 +389,9 @@ void pci_aer_init(struct pci_dev *dev)
 {
 	int n;
 
+	if (dev->no_aer)
+		return;
+
 	dev->aer_cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
 	if (!dev->aer_cap)
 		return;

diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c
index 38a41ccf79b9..ab904a224296 100644
--- a/drivers/pci/pcie/portdrv.c
+++ b/drivers/pci/pcie/portdrv.c

@@ -240,7 +240,7 @@ static int get_port_device_capability(struct pci_dev *dev)
 	if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
              pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) &&
 	    dev->aer_cap && pci_aer_available() &&
-	    (pcie_ports_native || host->native_aer))
+	    (pcie_ports_native || host->native_aer) && !dev->no_aer)
 		services |= PCIE_PORT_SERVICE_AER;
 #endif
 

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index b9c252aa6fe0..d36dd3f8bbf6 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c

@@ -6340,4 +6340,13 @@ static void pci_mask_replay_timer_timeout(struct pci_dev *pdev)
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9750, pci_mask_replay_timer_timeout);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9755, pci_mask_replay_timer_timeout);
+
+static void pci_disable_aer(struct pci_dev *pdev)
+{
+	pdev->no_aer = 1;
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15EA, pci_disable_aer);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15EB, pci_disable_aer);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15EC, pci_disable_aer);
+
 #endif

diff --git a/include/linux/pci.h b/include/linux/pci.h
index 864775651c6f..f447f86c6bdf 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h

@@ -440,6 +440,7 @@ struct pci_dev {
 	unsigned int	multifunction:1;	/* Multi-function device */
 
 	unsigned int	is_busmaster:1;		/* Is busmaster */
+	unsigned int	no_aer:1;		/* May not use AER */
 	unsigned int	no_msi:1;		/* May not use MSI */
 	unsigned int	no_64bit_msi:1;		/* May only use 32-bit MSIs */
 	unsigned int	block_cfg_access:1;	/* Config space access blocked */

-- 
2.43.0

On Wed, Jan 07, 2026 at 08:14:35AM +0000, Atharva Tiwari wrote:

Changes since v1:
	Transferred logic to drivers/pci/quicks.c

Disable AER for Intel Titan Ridge 4C 2018
(used in T2 iMacs, where the warnings appear)
that generate continuous pcieport warnings. such as:

pcieport 0000:00:1c.4: AER: Correctable error message received from 0000:07:00.0
pcieport 0000:07:00.0: PCIe Bus Error: severity=Correctable, type=Data Link Layer, (Receiver ID)
pcieport 0000:07:00.0:   device [8086:15ea] error status/mask=00000080/00002000
pcieport 0000:07:00.0:    [ 7] BadDLLP

(see: https://bugzilla.kernel.org/show_bug.cgi?id=220651)

macOS also disables AER for Thunderbolt devices and controllers in their drivers.

Signed-off-by: Atharva Tiwari <redacted>

Discussion in v1 of this patch is not yet concluded and you have sent v2. This
is not going to help merge this patch.

Since you don't know why AER is happening, you should wait for a response from
the Intel/Thunderbolt folks who know more about the hardware.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

On Wed, Jan 07, 2026 at 08:14:35AM +0000, Atharva Tiwari wrote:

Changes since v1:
	Transferred logic to drivers/pci/quicks.c

This should go below the line with the three dashes
so that it's not included in the commit when the patch
is applied to the maintainer's git tree.

Disable AER for Intel Titan Ridge 4C 2018
(used in T2 iMacs, where the warnings appear)
that generate continuous pcieport warnings. such as:

pcieport 0000:00:1c.4: AER: Correctable error message received from 0000:07:00.0
pcieport 0000:07:00.0: PCIe Bus Error: severity=Correctable, type=Data Link Layer, (Receiver ID)
pcieport 0000:07:00.0:   device [8086:15ea] error status/mask=00000080/00002000
pcieport 0000:07:00.0:    [ 7] BadDLLP

(see: https://bugzilla.kernel.org/show_bug.cgi?id=220651)

Use a Link: or Closes: tag for the bugzilla URL.

macOS also disables AER for Thunderbolt devices and controllers in their drivers.

Could you provide a link to the xnu source code
so that we can double-check what they're doing and why?

This will disable AER on all arches for all users, yet you've claimed
that the issue is confined to T2 Macs and caused by their firmware.

The proper approach would be to move this quirk to arch/x86/pci/fixups.c
so that it's not compiled on other arches.  Moreover you need a DMI check
to constrain this to T2 Macs so that AER stays enabled on other machines.

Since this is a discrete Thunderbolt controller, it is important to cc
Thunderbolt maintainers to get their feedback, yet your v2 patch wasn't
cc'ed to them.  Please be sure to include them in any follow-up submissions.

Thanks,

Lukas

Could you provide a link to the xnu source code
so that we can double-check what they're doing and why?

The XNU is open-source but its drivers are closed source
(which includes the thunderbolt drivers), so unfourtunatly
i cant provide the source code of the thunderbolt drivers in macOS.