Thread (9 messages) 9 messages, 3 authors, 2023-05-22

Re: [PATCH v2] powerpc/iommu: DMA address offset is incorrectly calculated with 2MB TCEs

From: Michael Ellerman <mpe@ellerman.id.au>
Date: 2023-05-04 05:11:05

Gaurav Batra [off-list ref] writes:
Hello Michael,

I was looking into the Bug: 199106 
(https://bugzilla.linux.ibm.com/show_bug.cgi?id=199106).

In the Bug, Mellanox driver was timing out when enabling SRIOV device.

I tested, Alexey's patch and it fixes the issue with Mellanox driver. 
The down side

to Alexey's fix is that even a small memory request by the driver will 
be aligned up

to 2MB. In my test, the Mellanox driver is issuing multiple requests of 
64K size.

All these will get aligned up to 2MB, which is quite a waste of resources.
OK. I guess we should use your patch then.

It's not ideal as it means the device can potentially read/write to
memory it shouldn't, but 2MB is a lot to waste for a 64K alloc.
In any case, both the patches work. Let me know which approach you 
prefer. In case

we decide to go with my patch, I just realized that I need to fix 
nio_pages in

iommu_free_coherent() as well.
Can you send a v3 with that fixed please.

cheers
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