There are many places that enable and disable AER interrupt, so move
them into helpers.
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Jonathan Cameron <redacted>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
- No change.
v5:
- Fix misspelling.
v4:
- No change.
v3:
- Correct subject.
v2:
- New patch.
drivers/pci/pcie/aer.c | 45 +++++++++++++++++++++++++-----------------
1 file changed, 27 insertions(+), 18 deletions(-)
PCIe services that share an IRQ with PME, such as AER or DPC, may cause a
spurious wakeup on system suspend. To prevent this, disable the AER interrupt
notification during the system suspend process.
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the AER
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable AER IRQ.
- No more check on PME IRQ#.
- Use helper.
drivers/pci/pcie/aer.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
PCIe services that share an IRQ with PME, such as AER or DPC, may cause a
spurious wakeup on system suspend. Since DPC depends on AER to work, disable
DPC interrupt notification during the system suspend process as AER interrupt
notification is already disabled by previous patch.
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the DPC
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable DPC IRQ.
- No more check on PME IRQ#.
drivers/pci/pcie/dpc.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
On Fri, May 12, 2023 at 8:01 AM Kai-Heng Feng
[off-list ref] wrote:
PCIe services that share an IRQ with PME, such as AER or DPC, may cause a
spurious wakeup on system suspend. To prevent this, disable the AER interrupt
notification during the system suspend process.
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the AER
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
A gentle ping...
quoted hunk
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable AER IRQ.
- No more check on PME IRQ#.
- Use helper.
drivers/pci/pcie/aer.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
[+cc Rafael]
On Fri, May 12, 2023 at 08:00:13AM +0800, Kai-Heng Feng wrote:
PCIe services that share an IRQ with PME, such as AER or DPC, may cause a
spurious wakeup on system suspend. To prevent this, disable the AER interrupt
notification during the system suspend process.
I see that in this particular BZ dmesg log, PME, AER, and DPC do share
the same IRQ, but I don't think this is true in general.
Root Ports usually use MSI or MSI-X. PME and hotplug events use the
Interrupt Message Number in the PCIe Capability, but AER uses the one
in the AER Root Error Status register, and DPC uses the one in the DPC
Capability register. Those potentially correspond to three distinct
MSI/MSI-X vectors.
I think this probably has nothing to do with the IRQ being *shared*,
but just that putting the downstream component into D3cold, where the
link state is L3, may cause the upstream component to log and signal a
link-related error as the link goes completely down.
I don't think D0-D3hot should be relevant here because in all those
states, the link should be active because the downstream config space
remains accessible. So I'm not sure if it's possible, but I wonder if
there's a more targeted place we could do this, e.g., in the path that
puts downstream devices in D3cold.
quoted hunk
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the AER
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable AER IRQ.
- No more check on PME IRQ#.
- Use helper.
drivers/pci/pcie/aer.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
On Tue, Jul 18, 2023 at 7:17 PM Bjorn Helgaas [off-list ref] wrote:
[+cc Rafael]
On Fri, May 12, 2023 at 08:00:13AM +0800, Kai-Heng Feng wrote:
quoted
PCIe services that share an IRQ with PME, such as AER or DPC, may cause a
spurious wakeup on system suspend. To prevent this, disable the AER interrupt
notification during the system suspend process.
I see that in this particular BZ dmesg log, PME, AER, and DPC do share
the same IRQ, but I don't think this is true in general.
Root Ports usually use MSI or MSI-X. PME and hotplug events use the
Interrupt Message Number in the PCIe Capability, but AER uses the one
in the AER Root Error Status register, and DPC uses the one in the DPC
Capability register. Those potentially correspond to three distinct
MSI/MSI-X vectors.
I think this probably has nothing to do with the IRQ being *shared*,
but just that putting the downstream component into D3cold, where the
link state is L3, may cause the upstream component to log and signal a
link-related error as the link goes completely down.
That's quite likely a better explanation than my wording.
Assuming AER IRQ and PME IRQ are not shared, does system get woken up
by AER IRQ?
I don't think D0-D3hot should be relevant here because in all those
states, the link should be active because the downstream config space
remains accessible. So I'm not sure if it's possible, but I wonder if
there's a more targeted place we could do this, e.g., in the path that
puts downstream devices in D3cold.
Let me try to work on this.
Kai-Heng
quoted
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the AER
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable AER IRQ.
- No more check on PME IRQ#.
- Use helper.
drivers/pci/pcie/aer.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
On Fri, Jul 21, 2023 at 11:58 AM Kai-Heng Feng
[off-list ref] wrote:
On Tue, Jul 18, 2023 at 7:17 PM Bjorn Helgaas [off-list ref] wrote:
quoted
[+cc Rafael]
On Fri, May 12, 2023 at 08:00:13AM +0800, Kai-Heng Feng wrote:
quoted
PCIe services that share an IRQ with PME, such as AER or DPC, may cause a
spurious wakeup on system suspend. To prevent this, disable the AER interrupt
notification during the system suspend process.
I see that in this particular BZ dmesg log, PME, AER, and DPC do share
the same IRQ, but I don't think this is true in general.
Root Ports usually use MSI or MSI-X. PME and hotplug events use the
Interrupt Message Number in the PCIe Capability, but AER uses the one
in the AER Root Error Status register, and DPC uses the one in the DPC
Capability register. Those potentially correspond to three distinct
MSI/MSI-X vectors.
I think this probably has nothing to do with the IRQ being *shared*,
but just that putting the downstream component into D3cold, where the
link state is L3, may cause the upstream component to log and signal a
link-related error as the link goes completely down.
That's quite likely a better explanation than my wording.
Assuming AER IRQ and PME IRQ are not shared, does system get woken up
by AER IRQ?
quoted
I don't think D0-D3hot should be relevant here because in all those
states, the link should be active because the downstream config space
remains accessible. So I'm not sure if it's possible, but I wonder if
there's a more targeted place we could do this, e.g., in the path that
puts downstream devices in D3cold.
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the AER
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable AER IRQ.
- No more check on PME IRQ#.
- Use helper.
drivers/pci/pcie/aer.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
On Fri, Jul 21, 2023 at 11:58:24AM +0800, Kai-Heng Feng wrote:
On Tue, Jul 18, 2023 at 7:17 PM Bjorn Helgaas [off-list ref] wrote:
quoted
On Fri, May 12, 2023 at 08:00:13AM +0800, Kai-Heng Feng wrote:
quoted
PCIe services that share an IRQ with PME, such as AER or DPC,
may cause a spurious wakeup on system suspend. To prevent this,
disable the AER interrupt notification during the system suspend
process.
I see that in this particular BZ dmesg log, PME, AER, and DPC do share
the same IRQ, but I don't think this is true in general.
Root Ports usually use MSI or MSI-X. PME and hotplug events use the
Interrupt Message Number in the PCIe Capability, but AER uses the one
in the AER Root Error Status register, and DPC uses the one in the DPC
Capability register. Those potentially correspond to three distinct
MSI/MSI-X vectors.
I think this probably has nothing to do with the IRQ being *shared*,
but just that putting the downstream component into D3cold, where the
link state is L3, may cause the upstream component to log and signal a
link-related error as the link goes completely down.
That's quite likely a better explanation than my wording.
Assuming AER IRQ and PME IRQ are not shared, does system get woken up
by AER IRQ?
Rafael could answer this better than I can, but
Documentation/power/suspend-and-interrupts.rst says device interrupts
are generally disabled during suspend after the "late" phase of
suspending devices, i.e.,
dpm_suspend_noirq
suspend_device_irqs <-- disable non-wakeup IRQs
dpm_noirq_suspend_devices
...
pci_pm_suspend_noirq # (I assume)
pci_prepare_to_sleep
I think the downstream component would be put in D3cold by
pci_prepare_to_sleep(), so non-wakeup interrupts should be disabled by
then.
I assume PME would generally *not* be disabled since it's needed for
wakeup, so I think any interrupt that shares the PME IRQ and occurs
during suspend may cause a spurious wakeup.
If so, it's exactly as you said at the beginning: AER/DPC/etc sharing
the PME IRQ may cause spurious wakeups, and we would have to disable
those other interrupts at the source, e.g., by clearing
PCI_ERR_ROOT_CMD_FATAL_EN etc (exactly as your series does).
quoted
I don't think D0-D3hot should be relevant here because in all those
states, the link should be active because the downstream config space
remains accessible. So I'm not sure if it's possible, but I wonder if
there's a more targeted place we could do this, e.g., in the path that
puts downstream devices in D3cold.
Let me try to work on this.
Kai-Heng
quoted
quoted
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the AER
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable AER IRQ.
- No more check on PME IRQ#.
- Use helper.
drivers/pci/pcie/aer.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
On Thu, Aug 10, 2023 at 2:52 AM Bjorn Helgaas [off-list ref] wrote:
On Fri, Jul 21, 2023 at 11:58:24AM +0800, Kai-Heng Feng wrote:
quoted
On Tue, Jul 18, 2023 at 7:17 PM Bjorn Helgaas [off-list ref] wrote:
quoted
On Fri, May 12, 2023 at 08:00:13AM +0800, Kai-Heng Feng wrote:
quoted
PCIe services that share an IRQ with PME, such as AER or DPC,
may cause a spurious wakeup on system suspend. To prevent this,
disable the AER interrupt notification during the system suspend
process.
I see that in this particular BZ dmesg log, PME, AER, and DPC do share
the same IRQ, but I don't think this is true in general.
Root Ports usually use MSI or MSI-X. PME and hotplug events use the
Interrupt Message Number in the PCIe Capability, but AER uses the one
in the AER Root Error Status register, and DPC uses the one in the DPC
Capability register. Those potentially correspond to three distinct
MSI/MSI-X vectors.
I think this probably has nothing to do with the IRQ being *shared*,
but just that putting the downstream component into D3cold, where the
link state is L3, may cause the upstream component to log and signal a
link-related error as the link goes completely down.
That's quite likely a better explanation than my wording.
Assuming AER IRQ and PME IRQ are not shared, does system get woken up
by AER IRQ?
Rafael could answer this better than I can, but
Documentation/power/suspend-and-interrupts.rst says device interrupts
are generally disabled during suspend after the "late" phase of
suspending devices, i.e.,
dpm_suspend_noirq
suspend_device_irqs <-- disable non-wakeup IRQs
dpm_noirq_suspend_devices
...
pci_pm_suspend_noirq # (I assume)
pci_prepare_to_sleep
I think the downstream component would be put in D3cold by
pci_prepare_to_sleep(), so non-wakeup interrupts should be disabled by
then.
I assume PME would generally *not* be disabled since it's needed for
wakeup, so I think any interrupt that shares the PME IRQ and occurs
during suspend may cause a spurious wakeup.
Yes, that's the case here.
If so, it's exactly as you said at the beginning: AER/DPC/etc sharing
the PME IRQ may cause spurious wakeups, and we would have to disable
those other interrupts at the source, e.g., by clearing
PCI_ERR_ROOT_CMD_FATAL_EN etc (exactly as your series does).
So is the series good to be merged now?
Kai-Heng
quoted
quoted
I don't think D0-D3hot should be relevant here because in all those
states, the link should be active because the downstream config space
remains accessible. So I'm not sure if it's possible, but I wonder if
there's a more targeted place we could do this, e.g., in the path that
puts downstream devices in D3cold.
Let me try to work on this.
Kai-Heng
quoted
quoted
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the AER
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable AER IRQ.
- No more check on PME IRQ#.
- Use helper.
drivers/pci/pcie/aer.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
On Thu, Aug 10, 2023 at 04:17:21PM +0800, Kai-Heng Feng wrote:
On Thu, Aug 10, 2023 at 2:52 AM Bjorn Helgaas [off-list ref] wrote:
quoted
On Fri, Jul 21, 2023 at 11:58:24AM +0800, Kai-Heng Feng wrote:
quoted
On Tue, Jul 18, 2023 at 7:17 PM Bjorn Helgaas [off-list ref] wrote:
quoted
On Fri, May 12, 2023 at 08:00:13AM +0800, Kai-Heng Feng wrote:
quoted
PCIe services that share an IRQ with PME, such as AER or DPC,
may cause a spurious wakeup on system suspend. To prevent this,
disable the AER interrupt notification during the system suspend
process.
I see that in this particular BZ dmesg log, PME, AER, and DPC do share
the same IRQ, but I don't think this is true in general.
Root Ports usually use MSI or MSI-X. PME and hotplug events use the
Interrupt Message Number in the PCIe Capability, but AER uses the one
in the AER Root Error Status register, and DPC uses the one in the DPC
Capability register. Those potentially correspond to three distinct
MSI/MSI-X vectors.
I think this probably has nothing to do with the IRQ being *shared*,
but just that putting the downstream component into D3cold, where the
link state is L3, may cause the upstream component to log and signal a
link-related error as the link goes completely down.
That's quite likely a better explanation than my wording.
Assuming AER IRQ and PME IRQ are not shared, does system get woken up
by AER IRQ?
Rafael could answer this better than I can, but
Documentation/power/suspend-and-interrupts.rst says device interrupts
are generally disabled during suspend after the "late" phase of
suspending devices, i.e.,
dpm_suspend_noirq
suspend_device_irqs <-- disable non-wakeup IRQs
dpm_noirq_suspend_devices
...
pci_pm_suspend_noirq # (I assume)
pci_prepare_to_sleep
I think the downstream component would be put in D3cold by
pci_prepare_to_sleep(), so non-wakeup interrupts should be disabled by
then.
I assume PME would generally *not* be disabled since it's needed for
wakeup, so I think any interrupt that shares the PME IRQ and occurs
during suspend may cause a spurious wakeup.
Yes, that's the case here.
quoted
If so, it's exactly as you said at the beginning: AER/DPC/etc sharing
the PME IRQ may cause spurious wakeups, and we would have to disable
those other interrupts at the source, e.g., by clearing
PCI_ERR_ROOT_CMD_FATAL_EN etc (exactly as your series does).
So is the series good to be merged now?
If we merge as-is, won't we disable AER & DPC interrupts unnecessarily
in the case where the link goes to D3hot? In that case, there's no
reason to expect interrupts related to the link going down, but things
like PTM messages still work, and they may cause errors that we should
know about.
quoted
quoted
quoted
I don't think D0-D3hot should be relevant here because in all those
states, the link should be active because the downstream config space
remains accessible. So I'm not sure if it's possible, but I wonder if
there's a more targeted place we could do this, e.g., in the path that
puts downstream devices in D3cold.
Let me try to work on this.
Kai-Heng
quoted
quoted
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the AER
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable AER IRQ.
- No more check on PME IRQ#.
- Use helper.
drivers/pci/pcie/aer.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
On Thu, Aug 10, 2023 at 6:51 PM Bjorn Helgaas [off-list ref] wrote:
On Thu, Aug 10, 2023 at 04:17:21PM +0800, Kai-Heng Feng wrote:
quoted
On Thu, Aug 10, 2023 at 2:52 AM Bjorn Helgaas [off-list ref] wrote:
quoted
On Fri, Jul 21, 2023 at 11:58:24AM +0800, Kai-Heng Feng wrote:
quoted
On Tue, Jul 18, 2023 at 7:17 PM Bjorn Helgaas [off-list ref] wrote:
quoted
On Fri, May 12, 2023 at 08:00:13AM +0800, Kai-Heng Feng wrote:
quoted
PCIe services that share an IRQ with PME, such as AER or DPC,
may cause a spurious wakeup on system suspend. To prevent this,
disable the AER interrupt notification during the system suspend
process.
I see that in this particular BZ dmesg log, PME, AER, and DPC do share
the same IRQ, but I don't think this is true in general.
Root Ports usually use MSI or MSI-X. PME and hotplug events use the
Interrupt Message Number in the PCIe Capability, but AER uses the one
in the AER Root Error Status register, and DPC uses the one in the DPC
Capability register. Those potentially correspond to three distinct
MSI/MSI-X vectors.
I think this probably has nothing to do with the IRQ being *shared*,
but just that putting the downstream component into D3cold, where the
link state is L3, may cause the upstream component to log and signal a
link-related error as the link goes completely down.
That's quite likely a better explanation than my wording.
Assuming AER IRQ and PME IRQ are not shared, does system get woken up
by AER IRQ?
Rafael could answer this better than I can, but
Documentation/power/suspend-and-interrupts.rst says device interrupts
are generally disabled during suspend after the "late" phase of
suspending devices, i.e.,
dpm_suspend_noirq
suspend_device_irqs <-- disable non-wakeup IRQs
dpm_noirq_suspend_devices
...
pci_pm_suspend_noirq # (I assume)
pci_prepare_to_sleep
I think the downstream component would be put in D3cold by
pci_prepare_to_sleep(), so non-wakeup interrupts should be disabled by
then.
I assume PME would generally *not* be disabled since it's needed for
wakeup, so I think any interrupt that shares the PME IRQ and occurs
during suspend may cause a spurious wakeup.
Yes, that's the case here.
quoted
If so, it's exactly as you said at the beginning: AER/DPC/etc sharing
the PME IRQ may cause spurious wakeups, and we would have to disable
those other interrupts at the source, e.g., by clearing
PCI_ERR_ROOT_CMD_FATAL_EN etc (exactly as your series does).
So is the series good to be merged now?
If we merge as-is, won't we disable AER & DPC interrupts unnecessarily
in the case where the link goes to D3hot? In that case, there's no
reason to expect interrupts related to the link going down, but things
like PTM messages still work, and they may cause errors that we should
know about.
Because the issue can be observed on D3hot as well [0].
The root port device [0] is power managed by ACPI, so I wonder if it's
reasonable to disable AER & DPC for devices that power managed by
firmware?
[0] https://bugzilla.kernel.org/show_bug.cgi?id=216295#c3
Kai-Heng
quoted
quoted
quoted
quoted
I don't think D0-D3hot should be relevant here because in all those
states, the link should be active because the downstream config space
remains accessible. So I'm not sure if it's possible, but I wonder if
there's a more targeted place we could do this, e.g., in the path that
puts downstream devices in D3cold.
Let me try to work on this.
Kai-Heng
quoted
quoted
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the AER
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable AER IRQ.
- No more check on PME IRQ#.
- Use helper.
drivers/pci/pcie/aer.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
On Fri, Aug 11, 2023 at 4:00 PM Kai-Heng Feng
[off-list ref] wrote:
On Thu, Aug 10, 2023 at 6:51 PM Bjorn Helgaas [off-list ref] wrote:
quoted
On Thu, Aug 10, 2023 at 04:17:21PM +0800, Kai-Heng Feng wrote:
quoted
On Thu, Aug 10, 2023 at 2:52 AM Bjorn Helgaas [off-list ref] wrote:
quoted
On Fri, Jul 21, 2023 at 11:58:24AM +0800, Kai-Heng Feng wrote:
quoted
On Tue, Jul 18, 2023 at 7:17 PM Bjorn Helgaas [off-list ref] wrote:
quoted
On Fri, May 12, 2023 at 08:00:13AM +0800, Kai-Heng Feng wrote:
quoted
PCIe services that share an IRQ with PME, such as AER or DPC,
may cause a spurious wakeup on system suspend. To prevent this,
disable the AER interrupt notification during the system suspend
process.
I see that in this particular BZ dmesg log, PME, AER, and DPC do share
the same IRQ, but I don't think this is true in general.
Root Ports usually use MSI or MSI-X. PME and hotplug events use the
Interrupt Message Number in the PCIe Capability, but AER uses the one
in the AER Root Error Status register, and DPC uses the one in the DPC
Capability register. Those potentially correspond to three distinct
MSI/MSI-X vectors.
I think this probably has nothing to do with the IRQ being *shared*,
but just that putting the downstream component into D3cold, where the
link state is L3, may cause the upstream component to log and signal a
link-related error as the link goes completely down.
That's quite likely a better explanation than my wording.
Assuming AER IRQ and PME IRQ are not shared, does system get woken up
by AER IRQ?
Rafael could answer this better than I can, but
Documentation/power/suspend-and-interrupts.rst says device interrupts
are generally disabled during suspend after the "late" phase of
suspending devices, i.e.,
dpm_suspend_noirq
suspend_device_irqs <-- disable non-wakeup IRQs
dpm_noirq_suspend_devices
...
pci_pm_suspend_noirq # (I assume)
pci_prepare_to_sleep
I think the downstream component would be put in D3cold by
pci_prepare_to_sleep(), so non-wakeup interrupts should be disabled by
then.
I assume PME would generally *not* be disabled since it's needed for
wakeup, so I think any interrupt that shares the PME IRQ and occurs
during suspend may cause a spurious wakeup.
Yes, that's the case here.
quoted
If so, it's exactly as you said at the beginning: AER/DPC/etc sharing
the PME IRQ may cause spurious wakeups, and we would have to disable
those other interrupts at the source, e.g., by clearing
PCI_ERR_ROOT_CMD_FATAL_EN etc (exactly as your series does).
So is the series good to be merged now?
If we merge as-is, won't we disable AER & DPC interrupts unnecessarily
in the case where the link goes to D3hot? In that case, there's no
reason to expect interrupts related to the link going down, but things
like PTM messages still work, and they may cause errors that we should
know about.
Because the issue can be observed on D3hot as well [0].
The root port device [0] is power managed by ACPI, so I wonder if it's
reasonable to disable AER & DPC for devices that power managed by
firmware?
OK, I think the D3hot case is different to this one, so I'll work on
next revision that only disable AER/DPC when power is really off.
In additional to disabling interrupt, is it reasonable to disable AER
and DPC service completely, so unwanted electric noise wont trigger a
DPC reset?
Kai-Heng
I don't think D0-D3hot should be relevant here because in all those
states, the link should be active because the downstream config space
remains accessible. So I'm not sure if it's possible, but I wonder if
there's a more targeted place we could do this, e.g., in the path that
puts downstream devices in D3cold.
Let me try to work on this.
Kai-Heng
quoted
quoted
As Per PCIe Base Spec 5.0, section 5.2, titled "Link State Power Management",
TLP and DLLP transmission are disabled for a Link in L2/L3 Ready (D3hot), L2
(D3cold with aux power) and L3 (D3cold) states. So disabling the AER
notification during suspend and re-enabling them during the resume process
should not affect the basic functionality.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216295
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Kai-Heng Feng <redacted>
---
v6:
v5:
- Wording.
v4:
v3:
- No change.
v2:
- Only disable AER IRQ.
- No more check on PME IRQ#.
- Use helper.
drivers/pci/pcie/aer.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
On Fri, May 12, 2023 at 08:00:12AM +0800, Kai-Heng Feng wrote:
There are many places that enable and disable AER interrupt, so move
them into helpers.
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Jonathan Cameron <redacted>
Signed-off-by: Kai-Heng Feng <redacted>
I applied this patch (only 1/3) to pci/aer for v6.7.
I'm not clear on the others yet, so let's look at those again after
v6.7-rc1. It seemed like there's still a question about disabling
interrupts when we're going to D3hot.