From: Jordan Niethe <hidden> Date: 2020-08-27 04:07:47
Update the CPU to ISA Version Mapping document to include Power10 and
ISA v3.1.
Signed-off-by: Jordan Niethe <redacted>
---
v2: Transactional Memory = No
---
Documentation/powerpc/isa-versions.rst | 4 ++++
1 file changed, 4 insertions(+)
@@ -7,6 +7,7 @@ Mapping of some CPU versions to relevant ISA versions. ========= ==================================================================== CPU Architecture version ========= ====================================================================+Power10 Power ISA v3.1 Power9 Power ISA v3.0B Power8 Power ISA v2.07 Power7 Power ISA v2.06
@@ -62,6 +65,7 @@ PPC970 No ========== ==================================== CPU Transactional Memory ========== ====================================+Power10 No (* see Power ISA v3.1 Appendix A.) Power9 Yes (* see transactional_memory.txt) Power8 Yes Power7 No
@@ -7,6 +7,7 @@ Mapping of some CPU versions to relevant ISA versions. ========= ==================================================================== CPU Architecture version ========= ====================================================================+Power10 Power ISA v3.1 Power9 Power ISA v3.0B Power8 Power ISA v2.07 Power7 Power ISA v2.06
@@ -62,6 +65,7 @@ PPC970 No ========== ==================================== CPU Transactional Memory ========== ====================================+Power10 No (* see Power ISA v3.1 Appendix A.) Power9 Yes (* see transactional_memory.txt) Power8 Yes Power7 No
@@ -7,6 +7,7 @@ Mapping of some CPU versions to relevant ISA versions. ========= ==================================================================== CPU Architecture version ========= ====================================================================+Power10 Power ISA v3.1 Power9 Power ISA v3.0B Power8 Power ISA v2.07 Power7 Power ISA v2.06
@@ -62,6 +65,7 @@ PPC970 No ========== ==================================== CPU Transactional Memory ========== ====================================+Power10 No (* see Power ISA v3.1 Appendix A.) Power9 Yes (* see transactional_memory.txt) Power8 Yes Power7 No
From: Michael Ellerman <mpe@ellerman.id.au> Date: 2020-08-27 06:20:08
Jordan Niethe [off-list ref] writes:
quoted hunk
Update the CPU to ISA Version Mapping document to include Power10 and
ISA v3.1.
Signed-off-by: Jordan Niethe <redacted>
---
v2: Transactional Memory = No
---
Documentation/powerpc/isa-versions.rst | 4 ++++
1 file changed, 4 insertions(+)
@@ -62,6 +65,7 @@ PPC970 No ========== ==================================== CPU Transactional Memory ========== ====================================+Power10 No (* see Power ISA v3.1 Appendix A.)
There's three "Appendix A"s in ISA v3.1.
There's one in Book I, and one in Book II.
And then the one you're referring to is not actually in Book III, it's
listed after Book III, and is apparently an appendix to all three books?
Which is just utterly confusing.
So I'll change it to say:
"Appendix A. Notes on the Removal of Transactional Memory from the Architecture"
Which is very long, but at least you can search for it.
cheers