XIVE interrupt controller use an Event Queue (EQ) to enqueue event
notifications when an exception occurs. The EQ is a single memory page
provided by the O/S defining a circular buffer, one per server and
priority couple.
On baremetal, the EQ page is configured with an OPAL call. On pseries,
an extra hop is necessary and the guest OS uses the hcall
H_INT_SET_QUEUE_CONFIG to configure the XIVE interrupt controller.
The XIVE controller being Hypervisor privileged, it will not be allowed
to enqueue event notifications for a Secure VM unless the EQ pages are
shared by the Secure VM.
Hypervisor/Ultravisor still requires support for the TIMA and ESB page
fault handlers. Until this is complete, QEMU can use the emulated XIVE
device for Secure VMs, option "kernel_irqchip=off" on the QEMU pseries
machine.
Cc: kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <redacted>
Cc: Michael Anderson <redacted>
Cc: Sukadev Bhattiprolu <redacted>
Cc: Alexey Kardashevskiy <redacted>
Cc: Paul Mackerras <redacted>
Cc: Greg Kurz <redacted>
Cc: Cedric Le Goater <redacted>
Cc: David Gibson <redacted>
Signed-off-by: Ram Pai <redacted>
v2: better description of the patch from Cedric.
---
arch/powerpc/sysdev/xive/spapr.c | 7 +++++++
1 file changed, 7 insertions(+)
From: Cédric Le Goater <clg@kaod.org> Date: 2020-03-26 08:47:53
On 3/26/20 9:38 AM, Ram Pai wrote:
XIVE interrupt controller use an Event Queue (EQ) to enqueue event
The XIVE interrupt controller uses ... (my bad)
notifications when an exception occurs. The EQ is a single memory page
provided by the O/S defining a circular buffer, one per server and
priority couple.
On baremetal, the EQ page is configured with an OPAL call. On pseries,
an extra hop is necessary and the guest OS uses the hcall
H_INT_SET_QUEUE_CONFIG to configure the XIVE interrupt controller.
The XIVE controller being Hypervisor privileged, it will not be allowed
to enqueue event notifications for a Secure VM unless the EQ pages are
shared by the Secure VM.
Hypervisor/Ultravisor still requires support for the TIMA and ESB page
fault handlers. Until this is complete, QEMU can use the emulated XIVE
device for Secure VMs, option "kernel_irqchip=off" on the QEMU pseries
machine.
Cc: kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <redacted>
Cc: Michael Anderson <redacted>
Cc: Sukadev Bhattiprolu <redacted>
Cc: Alexey Kardashevskiy <redacted>
Cc: Paul Mackerras <redacted>
Cc: Greg Kurz <redacted>
Cc: Cedric Le Goater <redacted>
clg@fr.ibm.com is insecure. Please use clg@kaod.org.
Cc: David Gibson <redacted>
Signed-off-by: Ram Pai <redacted>
Reviewed-by: Cedric Le Goater <clg@kaod.org>
Thanks,
C.
quoted hunk
v2: better description of the patch from Cedric.
---
arch/powerpc/sysdev/xive/spapr.c | 7 +++++++
1 file changed, 7 insertions(+)
From: Greg Kurz <hidden> Date: 2020-03-26 10:06:09
On Thu, 26 Mar 2020 01:38:47 -0700
Ram Pai [off-list ref] wrote:
XIVE interrupt controller use an Event Queue (EQ) to enqueue event
notifications when an exception occurs. The EQ is a single memory page
provided by the O/S defining a circular buffer, one per server and
priority couple.
On baremetal, the EQ page is configured with an OPAL call. On pseries,
an extra hop is necessary and the guest OS uses the hcall
H_INT_SET_QUEUE_CONFIG to configure the XIVE interrupt controller.
The XIVE controller being Hypervisor privileged, it will not be allowed
to enqueue event notifications for a Secure VM unless the EQ pages are
shared by the Secure VM.
Hypervisor/Ultravisor still requires support for the TIMA and ESB page
fault handlers. Until this is complete, QEMU can use the emulated XIVE
device for Secure VMs, option "kernel_irqchip=off" on the QEMU pseries
machine.
Cc: kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <redacted>
Cc: Michael Anderson <redacted>
Cc: Sukadev Bhattiprolu <redacted>
Cc: Alexey Kardashevskiy <redacted>
Cc: Paul Mackerras <redacted>
Cc: Greg Kurz <redacted>
Cc: Cedric Le Goater <redacted>
Cc: David Gibson <redacted>
Signed-off-by: Ram Pai <redacted>
v2: better description of the patch from Cedric.
---
If I understand this correctly, you're passing the number of bytes of
the queue to uv_share_page(), but that ultracall expects the number of
pages to be shared.
If I understand this correctly, you're passing the number of bytes of
the queue to uv_share_page(), but that ultracall expects the number of
pages to be shared.
static inline u32 xive_alloc_order(u32 queue_shift)
{
return (queue_shift > PAGE_SHIFT) ? (queue_shift - PAGE_SHIFT) : 0;
}
xive_alloc_order(order) returns the order of PAGE_SIZE pages.
Hence the value passed to uv_shared_pages is the number of pages,
and not the number of bytes.
BTW: I did verify through testing that it was indeed passing 1 page to the
uv_share_page().
RP
If I understand this correctly, you're passing the number of bytes of
the queue to uv_share_page(), but that ultracall expects the number of
pages to be shared.
static inline u32 xive_alloc_order(u32 queue_shift)
{
return (queue_shift > PAGE_SHIFT) ? (queue_shift - PAGE_SHIFT) : 0;
}
xive_alloc_order(order) returns the order of PAGE_SIZE pages.
Hence the value passed to uv_shared_pages is the number of pages,
and not the number of bytes.
BTW: I did verify through testing that it was indeed passing 1 page to the
uv_share_page().
Ah, my mistake. I misunderstood the code. Sorry for the noise and thanks
for clarifying.
--
Thiago Jung Bauermann
IBM Linux Technology Center
From 10ea2eaf492ca3f22f67a5a63a2b7865e45299ad Mon Sep 17 00:00:00 2001
From: Ram Pai <redacted>
Date: Mon, 24 Feb 2020 01:09:48 -0500
Subject: [PATCH v3] powerpc/XIVE: SVM: share the event-queue page with the
Hypervisor.
XIVE interrupt controller uses an Event Queue (EQ) to enqueue event
notifications when an exception occurs. The EQ is a single memory page
provided by the O/S defining a circular buffer, one per server and
priority couple.
On baremetal, the EQ page is configured with an OPAL call. On pseries,
an extra hop is necessary and the guest OS uses the hcall
H_INT_SET_QUEUE_CONFIG to configure the XIVE interrupt controller.
The XIVE controller being Hypervisor privileged, it will not be allowed
to enqueue event notifications for a Secure VM unless the EQ pages are
shared by the Secure VM.
Hypervisor/Ultravisor still requires support for the TIMA and ESB page
fault handlers. Until this is complete, QEMU can use the emulated XIVE
device for Secure VMs, option "kernel_irqchip=off" on the QEMU pseries
machine.
Cc: kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <redacted>
Cc: Michael Anderson <redacted>
Cc: Sukadev Bhattiprolu <redacted>
Cc: Alexey Kardashevskiy <redacted>
Cc: Paul Mackerras <redacted>
Cc: David Gibson <redacted>
Reviewed-by: Cedric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <redacted>
Signed-off-by: Ram Pai <redacted>
v3: fix a minor semantics in description.
and added reviewed-by from Cedric and Greg.
v2: better description of the patch from Cedric.
---
arch/powerpc/sysdev/xive/spapr.c | 7 +++++++
1 file changed, 7 insertions(+)
XIVE interrupt controller uses an Event Queue (EQ) to enqueue event
notifications when an exception occurs. The EQ is a single memory page
provided by the O/S defining a circular buffer, one per server and
priority couple.
On baremetal, the EQ page is configured with an OPAL call. On pseries,
an extra hop is necessary and the guest OS uses the hcall
H_INT_SET_QUEUE_CONFIG to configure the XIVE interrupt controller.
The XIVE controller being Hypervisor privileged, it will not be allowed
to enqueue event notifications for a Secure VM unless the EQ pages are
shared by the Secure VM.
Hypervisor/Ultravisor still requires support for the TIMA and ESB page
fault handlers. Until this is complete, QEMU can use the emulated XIVE
device for Secure VMs, option "kernel_irqchip=off" on the QEMU pseries
machine.
Cc: kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <redacted>
Cc: Michael Anderson <redacted>
Cc: Sukadev Bhattiprolu <redacted>
Cc: Alexey Kardashevskiy <redacted>
Cc: Paul Mackerras <redacted>
Cc: David Gibson <redacted>
Reviewed-by: Cedric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <redacted>
Signed-off-by: Ram Pai <redacted>
v3: fix a minor semantics in description.
and added reviewed-by from Cedric and Greg.
v2: better description of the patch from Cedric.
---
arch/powerpc/sysdev/xive/spapr.c | 7 +++++++
1 file changed, 7 insertions(+)
From: Michael Ellerman <mpe@ellerman.id.au> Date: 2020-05-27 03:54:22
Ram Pai [off-list ref] writes:
XIVE interrupt controller uses an Event Queue (EQ) to enqueue event
notifications when an exception occurs. The EQ is a single memory page
provided by the O/S defining a circular buffer, one per server and
priority couple.
On baremetal, the EQ page is configured with an OPAL call. On pseries,
an extra hop is necessary and the guest OS uses the hcall
H_INT_SET_QUEUE_CONFIG to configure the XIVE interrupt controller.
The XIVE controller being Hypervisor privileged, it will not be allowed
to enqueue event notifications for a Secure VM unless the EQ pages are
shared by the Secure VM.
Hypervisor/Ultravisor still requires support for the TIMA and ESB page
fault handlers. Until this is complete, QEMU can use the emulated XIVE
device for Secure VMs, option "kernel_irqchip=off" on the QEMU pseries
machine.
Cc: kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <redacted>
Cc: Michael Anderson <redacted>
Cc: Sukadev Bhattiprolu <redacted>
Cc: Alexey Kardashevskiy <redacted>
Cc: Paul Mackerras <redacted>
Cc: David Gibson <redacted>
Reviewed-by: Cedric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <redacted>
Signed-off-by: Ram Pai <redacted>
v3: fix a minor semantics in description.
and added reviewed-by from Cedric and Greg.
v2: better description of the patch from Cedric.
---
Please put the change history after the '---' break in future please, I
had to fix this up manually.
cheers
From: Michael Ellerman <hidden> Date: 2020-06-09 06:11:40
On Sat, 25 Apr 2020 19:05:18 -0700, Ram Pai wrote:
quoted
From 10ea2eaf492ca3f22f67a5a63a2b7865e45299ad Mon Sep 17 00:00:00 2001
From: Ram Pai <redacted>
Date: Mon, 24 Feb 2020 01:09:48 -0500
Subject: [PATCH v3] powerpc/XIVE: SVM: share the event-queue page with the
Hypervisor.
XIVE interrupt controller uses an Event Queue (EQ) to enqueue event
notifications when an exception occurs. The EQ is a single memory page
provided by the O/S defining a circular buffer, one per server and
priority couple.
[...]