# \[PATCH v5 46/48\] net/wan/fsl\_ucc\_hdlc: reject muram offsets above 64K - From: Rasmus Villemoes \ - Date: 2019-11-18 11:24:39 - List: linuxppc-dev - Page: https://ratatoskr.run/linuxppc-dev/2019/11/5779870 - Thread: https://ratatoskr.run/linuxppc-dev/2019/11/5779897/t.md ```text Qiang Zhao points out that these offsets get written to 16-bit registers, and there are some QE platforms with more than 64K muram. So it is possible that qe_muram_alloc() gives us an allocation that can't actually be used by the hardware, so detect and reject that. Reported-by: Qiang Zhao Signed-off-by: Rasmus Villemoes --- drivers/net/wan/fsl_ucc_hdlc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c index 8d13586bb774..f029eaa7cfc0 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.c +++ b/drivers/net/wan/fsl_ucc_hdlc.c @@ -245,6 +245,11 @@ static int uhdlc_init(struct ucc_hdlc_private *priv) ret = -ENOMEM; goto free_riptr; } + if (riptr != (u16)riptr || tiptr != (u16)tiptr) { + dev_err(priv->dev, "MURAM allocation out of addressable range\n"); + ret = -ENOMEM; + goto free_tiptr; + } /* Set RIPTR, TIPTR */ iowrite16be(riptr, &priv->ucc_pram->riptr); -- 2.23.0 ```