From: Michael Ellerman <mpe@ellerman.id.au> Date: 2019-01-17 12:16:23
It's easier to reason about the code if we only set mmu_slb_size in
one place, so convert open-coded assignments to use slb_set_size().
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/kernel/prom.c | 2 +-
arch/powerpc/mm/pgtable-radix.c | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
@@ -328,7 +328,8 @@ void __init radix_init_pgtable(void)structmemblock_region*reg;/* We don't support slb for radix */-mmu_slb_size=0;+slb_set_size(0);+/**Createthelinearmapping,usingstandardpagesizefornow*/
From: Michael Ellerman <mpe@ellerman.id.au> Date: 2019-01-17 12:18:28
The recent rewrite of the SLB code into C included the assumption that
all CPUs we run on have at least 32 SLB entries. This is currently
true but a bit fragile as the SLB size is actually defined by the
device tree and so could theoretically change at any time.
The assumption is encoded in the fact that we use U32_MAX as the value
for a full SLB bitmap. Instead, calculate what the full bitmap would
be based on the SLB size we're given and store it. This still requires
the SLB size to be a power of 2.
Fixes: 126b11b294d1 ("powerpc/64s/hash: Add SLB allocation status bitmaps")
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/mm/slb.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
From: Michael Ellerman <mpe@ellerman.id.au> Date: 2019-01-17 12:21:00
On machines with 1TB segments and a 32-entry SLB it's quite hard to
cause sufficient SLB pressure to trigger bugs caused due to badly
timed SLB faults.
We have seen this in the past and a few years ago added the
disable_1tb_segments command line option to force the use of 256MB
segments. However even this allows some bugs to slip through testing
if the SLB entry in question was recently accessed.
So add a new command line parameter for debugging which shrinks the
SLB to the minimum size we can support. Currently that size is 3, two
bolted SLBs and 1 for dynamic use. This creates the maximal SLB
pressure while still allowing the kernel to operate.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/mm/slb.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
From: Michael Ellerman <mpe@ellerman.id.au> Date: 2019-01-17 12:23:05
The SLB initialisation code is spread around a bit between prom.c and
hash_utils_64.c. Consolidate it all in hash_utils_64.c.
This slightly changes the timing of when mmu_slb_size is initialised,
but that should have no effect.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/kernel/prom.c | 16 ----------------
arch/powerpc/mm/hash_utils_64.c | 15 ++++++++++-----
2 files changed, 10 insertions(+), 21 deletions(-)
@@ -344,9 +344,8 @@ static int __init parse_disable_1tb_segments(char *p)}early_param("disable_1tb_segments",parse_disable_1tb_segments);-staticint__inithtab_dt_scan_seg_sizes(unsignedlongnode,-constchar*uname,intdepth,-void*data)+staticint__inithtab_dt_scan_slb(unsignedlongnode,constchar*uname,+intdepth,void*data){constchar*type=of_get_flat_dt_prop(node,"device_type",NULL);const__be32*prop;
@@ -356,6 +355,12 @@ static int __init htab_dt_scan_seg_sizes(unsigned long node,if(type==NULL||strcmp(type,"cpu")!=0)return0;+prop=of_get_flat_dt_prop(node,"slb-size",NULL);+if(!prop)+prop=of_get_flat_dt_prop(node,"ibm,slb-size",NULL);+if(prop)+slb_set_size(be32_to_cpup(prop));+prop=of_get_flat_dt_prop(node,"ibm,processor-segment-sizes",&size);if(prop==NULL)return0;
On Thu, Jan 17, 2019 at 11:13:26PM +1100, Michael Ellerman wrote:
The recent rewrite of the SLB code into C included the assumption that
all CPUs we run on have at least 32 SLB entries. This is currently
true but a bit fragile as the SLB size is actually defined by the
device tree and so could theoretically change at any time.
It also is guaranteed by the architecture, since at least 2.02, FWIW.
Segher
From: Michael Ellerman <mpe@ellerman.id.au> Date: 2019-01-18 12:31:25
Segher Boessenkool [off-list ref] writes:
On Thu, Jan 17, 2019 at 11:13:26PM +1100, Michael Ellerman wrote:
quoted
The recent rewrite of the SLB code into C included the assumption that
all CPUs we run on have at least 32 SLB entries. This is currently
true but a bit fragile as the SLB size is actually defined by the
device tree and so could theoretically change at any time.
It also is guaranteed by the architecture, since at least 2.02, FWIW.
True. Actually 2.00 says at least 32.
Unfortunately we don't live in a world where "the architecture
guarantees it" has any bearing on reality :)
But given it *should* always be at least 32 maybe I should optimise for
that case. We could use a static key to skip the U32_MAX comparison and
go down the else path.
cheers
On Fri, Jan 18, 2019 at 11:28:24PM +1100, Michael Ellerman wrote:
Segher Boessenkool [off-list ref] writes:
quoted
On Thu, Jan 17, 2019 at 11:13:26PM +1100, Michael Ellerman wrote:
quoted
The recent rewrite of the SLB code into C included the assumption that
all CPUs we run on have at least 32 SLB entries. This is currently
true but a bit fragile as the SLB size is actually defined by the
device tree and so could theoretically change at any time.
It also is guaranteed by the architecture, since at least 2.02, FWIW.
True. Actually 2.00 says at least 32.
Unfortunately we don't live in a world where "the architecture
guarantees it" has any bearing on reality :)
It's a pretty strong hint. I don't remember any hardware where it is not
true, either. (That might be selective memory ;-) )
But given it *should* always be at least 32 maybe I should optimise for
that case. We could use a static key to skip the U32_MAX comparison and
go down the else path.
From: Michal Suchánek <hidden> Date: 2019-01-19 00:15:04
On Thu, 17 Jan 2019 23:13:28 +1100
Michael Ellerman [off-list ref] wrote:
On machines with 1TB segments and a 32-entry SLB it's quite hard to
cause sufficient SLB pressure to trigger bugs caused due to badly
timed SLB faults.
We have seen this in the past and a few years ago added the
disable_1tb_segments command line option to force the use of 256MB
segments. However even this allows some bugs to slip through testing
if the SLB entry in question was recently accessed.
So add a new command line parameter for debugging which shrinks the
SLB to the minimum size we can support. Currently that size is 3, two
bolted SLBs and 1 for dynamic use. This creates the maximal SLB
Doesn't this violate the power of 2 requirement stated in 2/4?
Thanks
Michal
quoted hunk
pressure while still allowing the kernel to operate.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/mm/slb.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
From: Michael Ellerman <mpe@ellerman.id.au> Date: 2019-01-19 10:28:44
Michal Suchánek [off-list ref] writes:
On Thu, 17 Jan 2019 23:13:28 +1100
Michael Ellerman [off-list ref] wrote:
quoted
On machines with 1TB segments and a 32-entry SLB it's quite hard to
cause sufficient SLB pressure to trigger bugs caused due to badly
timed SLB faults.
We have seen this in the past and a few years ago added the
disable_1tb_segments command line option to force the use of 256MB
segments. However even this allows some bugs to slip through testing
if the SLB entry in question was recently accessed.
So add a new command line parameter for debugging which shrinks the
SLB to the minimum size we can support. Currently that size is 3, two
bolted SLBs and 1 for dynamic use. This creates the maximal SLB
Doesn't this violate the power of 2 requirement stated in 2/4?
Yes. Good point. This was originally a hack patch in my tree, back when
SLB_NUM_BOLTED was 3 and before Nick even added the slb_used_bitmap, so
back then it was a power of 2 but it also didn't matter :)
I think I'll rework the slb_full_bitmap patch anyway and remove the
power of 2 requirement, so then this patch will be OK.
Thanks for the review!
cheers
From: Nicholas Piggin <npiggin@gmail.com> Date: 2019-01-23 08:42:00
Michael Ellerman's on January 19, 2019 8:27 pm:
Michal Suchánek [off-list ref] writes:
quoted
On Thu, 17 Jan 2019 23:13:28 +1100
Michael Ellerman [off-list ref] wrote:
quoted
On machines with 1TB segments and a 32-entry SLB it's quite hard to
cause sufficient SLB pressure to trigger bugs caused due to badly
timed SLB faults.
We have seen this in the past and a few years ago added the
disable_1tb_segments command line option to force the use of 256MB
segments. However even this allows some bugs to slip through testing
if the SLB entry in question was recently accessed.
So add a new command line parameter for debugging which shrinks the
SLB to the minimum size we can support. Currently that size is 3, two
bolted SLBs and 1 for dynamic use. This creates the maximal SLB
Doesn't this violate the power of 2 requirement stated in 2/4?
Yes. Good point. This was originally a hack patch in my tree, back when
SLB_NUM_BOLTED was 3 and before Nick even added the slb_used_bitmap, so
back then it was a power of 2 but it also didn't matter :)
I think I'll rework the slb_full_bitmap patch anyway and remove the
power of 2 requirement, so then this patch will be OK.
Thanks, good patch and really will help testing. Sometimes even if you
can get enough pressure with the 256MB segments, you actually want to
test 1TB segment code paths too.
Thanks,
Nick
@@ -328,7 +328,8 @@ void __init radix_init_pgtable(void)structmemblock_region*reg;/* We don't support slb for radix */-mmu_slb_size=0;+slb_set_size(0);+/**Createthelinearmapping,usingstandardpagesizefornow*/
The recent rewrite of the SLB code into C included the assumption that
all CPUs we run on have at least 32 SLB entries. This is currently
true but a bit fragile as the SLB size is actually defined by the
device tree and so could theoretically change at any time.
The assumption is encoded in the fact that we use U32_MAX as the value
for a full SLB bitmap. Instead, calculate what the full bitmap would
be based on the SLB size we're given and store it. This still requires
the SLB size to be a power of 2.
So if it is less than 32 we want to make sure we don't allocate an index
above 32. Is this the reason for that radom assert_slb_presence?
Reviewed-by: Aneesh Kumar K.V <redacted>
The SLB initialisation code is spread around a bit between prom.c and
hash_utils_64.c. Consolidate it all in hash_utils_64.c.
This slightly changes the timing of when mmu_slb_size is initialised,
but that should have no effect.
@@ -344,9 +344,8 @@ static int __init parse_disable_1tb_segments(char *p)}early_param("disable_1tb_segments",parse_disable_1tb_segments);-staticint__inithtab_dt_scan_seg_sizes(unsignedlongnode,-constchar*uname,intdepth,-void*data)+staticint__inithtab_dt_scan_slb(unsignedlongnode,constchar*uname,+intdepth,void*data){constchar*type=of_get_flat_dt_prop(node,"device_type",NULL);const__be32*prop;
@@ -356,6 +355,12 @@ static int __init htab_dt_scan_seg_sizes(unsigned long node,if(type==NULL||strcmp(type,"cpu")!=0)return0;+prop=of_get_flat_dt_prop(node,"slb-size",NULL);+if(!prop)+prop=of_get_flat_dt_prop(node,"ibm,slb-size",NULL);+if(prop)+slb_set_size(be32_to_cpup(prop));+prop=of_get_flat_dt_prop(node,"ibm,processor-segment-sizes",&size);if(prop==NULL)return0;
On machines with 1TB segments and a 32-entry SLB it's quite hard to
cause sufficient SLB pressure to trigger bugs caused due to badly
timed SLB faults.
We have seen this in the past and a few years ago added the
disable_1tb_segments command line option to force the use of 256MB
segments. However even this allows some bugs to slip through testing
if the SLB entry in question was recently accessed.
So add a new command line parameter for debugging which shrinks the
SLB to the minimum size we can support. Currently that size is 3, two
bolted SLBs and 1 for dynamic use. This creates the maximal SLB
pressure while still allowing the kernel to operate.
Should we put this within DEBUG_VM?
Reviewed-by: Aneesh Kumar K.V <redacted>