[PATCH] powerpc/44x/bamboo: Fix PCI range

Subsystems: linux for powerpc (32-bit and 64-bit), the rest

STALE2781d

2 messages, 2 authors, 2018-12-22 · open the first message on its own page

[PATCH] powerpc/44x/bamboo: Fix PCI range

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2018-12-11 02:29:33

From 88509506b80b4960004146280eb740be64513a0b Mon Sep 17 00:00:00 2001
The bamboo dts has a bug: it uses a non-naturally aligned range
for PCI memory space. This isnt' supported by the code, thus
causing PCI to break on this system.

This is due to the fact that while the chip memory map has 1G
reserved for PCI memory, it's only 512M aligned. The code doesn't
know how to split that into 2 different PMMs and fails, so limit
the region to 512M.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
 arch/powerpc/boot/dts/bamboo.dts | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index 538e42b..b5861fa 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -268,8 +268,10 @@
 			/* Outbound ranges, one memory and one IO,
 			 * later cannot be changed. Chip supports a second
 			 * IO range but we don't use it for now
+			 * The chip also supports a larger memory range but
+			 * it's not naturally aligned, so our code will break
 			 */
-			ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x40000000
+			ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
 				  0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000
 				  0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
 

Re: powerpc/44x/bamboo: Fix PCI range

From: Michael Ellerman <hidden>
Date: 2018-12-22 10:23:47

On Tue, 2018-12-11 at 02:27:33 UTC, Benjamin Herrenschmidt wrote:
quoted
From 88509506b80b4960004146280eb740be64513a0b Mon Sep 17 00:00:00 2001
The bamboo dts has a bug: it uses a non-naturally aligned range
for PCI memory space. This isnt' supported by the code, thus
causing PCI to break on this system.

This is due to the fact that while the chip memory map has 1G
reserved for PCI memory, it's only 512M aligned. The code doesn't
know how to split that into 2 different PMMs and fails, so limit
the region to 512M.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/3cfb9ebe906b51f2942b1e251009bb

cheers
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