[PATCH] powerpc/ipic: Support edge on IRQ0

External IRQ0 has the same capabilities as the other IRQ1-7 and is
handled by the same register IPIC_SEPNR.  When this register is not
specified for "ack" in "ipic_info", you cannot configure this IRQ as
IRQ_TYPE_EDGE_FALLING.  This oversight was probably due to the
non-contiguous hwirq numbering of IRQ0 in the IPIC.

Signed-off-by: Jurgen Schindele <redacted>
[scottwood: Cleaned up commit message and posted as a proper patch]
Signed-off-by: Scott Wood <oss@buserror.net>
---
 arch/powerpc/sysdev/ipic.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index f267ee0afc08..16f1edd78c40 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c

@@ -315,6 +315,7 @@ static struct ipic_info ipic_info[] = {
 		.prio_mask = 7,
 	},
 	[48] = {
+		.ack	= IPIC_SEPNR,
 		.mask	= IPIC_SEMSR,
 		.prio	= IPIC_SMPRR_A,
 		.force	= IPIC_SEFCR,

-- 
2.11.0

Scott Wood [off-list ref] writes:

External IRQ0 has the same capabilities as the other IRQ1-7 and is
handled by the same register IPIC_SEPNR.  When this register is not
specified for "ack" in "ipic_info", you cannot configure this IRQ as
IRQ_TYPE_EDGE_FALLING.  This oversight was probably due to the
non-contiguous hwirq numbering of IRQ0 in the IPIC.

I don't know this code at all, but nothing in the diff says "IRQ0" to
me?

cheers

Index 48 equals IRQ0 in developpers manual


Am 26.06.2017 um 14:46 schrieb Michael Ellerman:

Scott Wood [off-list ref] writes:

quoted

External IRQ0 has the same capabilities as the other IRQ1-7 and is
handled by the same register IPIC_SEPNR.  When this register is not
specified for "ack" in "ipic_info", you cannot configure this IRQ as
IRQ_TYPE_EDGE_FALLING.  This oversight was probably due to the
non-contiguous hwirq numbering of IRQ0 in the IPIC.

I don't know this code at all, but nothing in the diff says "IRQ0" to
me?

cheers

quoted

diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index f267ee0afc08..16f1edd78c40 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c

@@ -315,6 +315,7 @@ static struct ipic_info ipic_info[] =3D {
  		.prio_mask =3D 7,
  	},
  	[48] =3D {
+		.ack	=3D IPIC_SEPNR,
  		.mask	=3D IPIC_SEMSR,
  		.prio	=3D IPIC_SMPRR_A,
  		.force	=3D IPIC_SEFCR,
--=20

2.11.0

--=20
  i. A.
J=C3=BCrgen Schindele
Softwareentwicklung

PSI Nentec GmbH
Greschbachstra=C3=9Fe 12
76229 Karlsruhe
Deutschland
Telefon: +49 721 94249-51
Telefax: +49 721 94249-10
schindele@nentec.de
www.nentec.de

Gesch=C3=A4ftsf=C3=BChrung: Klaus Becker, Roland Knapp
Sitz der Gesellschaft: Karlsruhe
Handelsregister: Amtsgericht Mannheim HRB 107658

Diese E-Mail enth=C3=A4lt vertrauliche oder rechtlich gesch=C3=BCtzte Inf=
ormationen. Wenn Sie nicht der vorgesehene Empf=C3=A4nger sind, informier=
en Sie bitte sofort den Absender und l=C3=B6schen Sie diese E-Mail. Das u=
nbefugte Kopieren dieser E-Mail oder die unbefugte Weitergabe der enthalt=
enen Informationen ist nicht gestattet.

The information contained in this message is confidential or protected by=
 law. If you are not the intended recipient, please contact the sender an=
d delete this message. Any unauthorised copying of this message or unauth=
orised distribution of the information contained herein is prohibited.

On Sun, 2017-06-25 at 02:39:05 UTC, Scott Wood wrote:

External IRQ0 has the same capabilities as the other IRQ1-7 and is
handled by the same register IPIC_SEPNR.  When this register is not
specified for "ack" in "ipic_info", you cannot configure this IRQ as
IRQ_TYPE_EDGE_FALLING.  This oversight was probably due to the
non-contiguous hwirq numbering of IRQ0 in the IPIC.

Signed-off-by: Jurgen Schindele <redacted>
[scottwood: Cleaned up commit message and posted as a proper patch]
Signed-off-by: Scott Wood <oss@buserror.net>

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/446183e4069e0b62cedfd72ccb90b8

cheers