From: Michael Neuling <hidden> Date: 2017-06-22 17:26:33
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
This patch invalidates the ERAT on wakeup on POWER9 to prevent this
from causing a problem.
Signed-off-by: Michael Neuling <redacted>
---
arch/powerpc/kernel/idle_book3s.S | 3 +++
1 file changed, 3 insertions(+)
From: Stewart Smith <hidden> Date: 2017-06-23 00:50:40
Michael Neuling [off-list ref] writes:
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
This patch invalidates the ERAT on wakeup on POWER9 to prevent this
from causing a problem.
Signed-off-by: Michael Neuling <redacted>
From: Michael Neuling <hidden> Date: 2017-06-23 02:12:06
Yes please... Would be helpful
On 22 Jun. 2017 7:50 pm, "Stewart Smith" [off-list ref] wrote:
Michael Neuling [off-list ref] writes:
quoted
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
This patch invalidates the ERAT on wakeup on POWER9 to prevent this
from causing a problem.
Signed-off-by: Michael Neuling <redacted>
From: Michael Neuling <hidden> Date: 2017-06-23 03:09:04
On Fri, 2017-06-23 at 10:50 +1000, Stewart Smith wrote:
Michael Neuling [off-list ref] writes:
quoted
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
=20
This patch invalidates the ERAT on wakeup on POWER9 to prevent this
from causing a problem.
=20
Signed-off-by: Michael Neuling <redacted>
From: Michael Ellerman <mpe@ellerman.id.au> Date: 2017-06-23 09:33:25
Michael Neuling [off-list ref] writes:
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
Incorrect how?
Because with the ERAT flush where you've put it, there's still a good
amount of code executed prior to the flush isn't there?
ie. we come in at 0x100, do some of the prolog, do IDLE_TEST which takes
us to pnv_powersave_wakeup, which then restores state from the paca
(memory), that returns and then we check KVM ... and then finally we end
up at pnv_wakeup_loss.
Or is there some other path? Or is the ERAT incorrect in some specific
way which means we only need to flush there?
cheers
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
This patch invalidates the ERAT on wakeup on POWER9 to prevent this
from causing a problem.
Cant there be any real genuine ERAT error on the wake up path
from these states ? Just being curious.
From: Nicholas Piggin <npiggin@gmail.com> Date: 2017-06-23 10:25:08
On Fri, 23 Jun 2017 19:33:23 +1000
Michael Ellerman [off-list ref] wrote:
Michael Neuling [off-list ref] writes:
quoted
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
Incorrect how?
It can have stale ERAT entries from another idle thread.
Because with the ERAT flush where you've put it, there's still a good
amount of code executed prior to the flush isn't there?
ie. we come in at 0x100, do some of the prolog, do IDLE_TEST which takes
us to pnv_powersave_wakeup, which then restores state from the paca
(memory), that returns and then we check KVM ... and then finally we end
up at pnv_wakeup_loss.
In the case of an HMI, we could call into OPAL as well.
Or is there some other path? Or is the ERAT incorrect in some specific
way which means we only need to flush there?
I think we're in real mode until returning from pnv_wakeup_loss so those
ERATs should be the same.
Except KVM, which can go to guest and switch on the MMU. My bad, I
suggested putting it into pnv_wakeup_loss.
Flushing at the start of pnv_powersave_wakeup should be safest. I guess
we can avoid it for non-state-loss wakeups if cr3 is lt.
Thanks,
Nick
From: Benjamin Herrenschmidt <benh@kernel.crashing.org> Date: 2017-06-23 10:45:48
On Fri, 2017-06-23 at 19:33 +1000, Michael Ellerman wrote:
Michael Neuling [off-list ref] writes:
quoted
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
Incorrect how?
As in stale. Not sure about the details.
Because with the ERAT flush where you've put it, there's still a good
amount of code executed prior to the flush isn't there?
In real mode, should be ok.
ie. we come in at 0x100, do some of the prolog, do IDLE_TEST which takes
us to pnv_powersave_wakeup, which then restores state from the paca
(memory), that returns and then we check KVM ... and then finally we end
up at pnv_wakeup_loss.
Or is there some other path? Or is the ERAT incorrect in some specific
way which means we only need to flush there?
I think real mode translations are ok but I'll ask around.
Cheers,
Ben.
From: Benjamin Herrenschmidt <benh@kernel.crashing.org> Date: 2017-06-24 17:29:13
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
This patch invalidates the ERAT on wakeup on POWER9 to prevent this
from causing a problem.
Signed-off-by: Michael Neuling <redacted>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2. [BenH] Move to a place before we branch off to KVM if the
core was in a guest. Also add a comment about the
SRR1 bit extraction.
---
arch/powerpc/kernel/exceptions-64s.S | 4 +++-
arch/powerpc/kernel/idle_book3s.S | 7 +++++++
2 files changed, 10 insertions(+), 1 deletion(-)
From: Nicholas Piggin <npiggin@gmail.com> Date: 2017-06-25 05:18:25
On Sat, 24 Jun 2017 12:29:01 -0500
Benjamin Herrenschmidt [off-list ref] wrote:
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
This patch invalidates the ERAT on wakeup on POWER9 to prevent this
from causing a problem.
Signed-off-by: Michael Neuling <redacted>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2. [BenH] Move to a place before we branch off to KVM if the
core was in a guest. Also add a comment about the
SRR1 bit extraction.
This looks a bit safer to me now (avoiding KVM). My understanding is
the real-mode i- and d-ERAT entries are still valid and usable,
which is why this works.
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
From: Michael Ellerman <hidden> Date: 2017-06-29 12:21:19
On Sat, 2017-06-24 at 17:29:01 UTC, Benjamin Herrenschmidt wrote:
On POWER9 the ERAT may be incorrect on wakeup from some stop states
that lose state. This causes random segvs and illegal instructions
when these stop states are enabled.
This patch invalidates the ERAT on wakeup on POWER9 to prevent this
from causing a problem.
Signed-off-by: Michael Neuling <redacted>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>