Thread (14 messages) 14 messages, 5 authors, 2016-04-12

Re: [PATCH] cxl: fix setting of _PAGE_USER bit when handling page faults

From: Ian Munsie <hidden>
Date: 2016-03-18 06:57:12

Excerpts from andrew.donnellan's message of 2016-03-18 15:01:21 +1100:
Fixes: f204e0b8cedd ("cxl: Driver code for powernv PCIe based cards for
userspace access")
It doesn't fix that since there was no cxl kernel API support at the
time, so this wasn't a regression - just something we missed when the
kernel api was added (I believe the broken test in the code was a left
over from some early bringup work and would never have been exercised on
an upstream kernel until then).
Currently, this should only affect cxlflash.
We haven't run into any problems because of this that I am aware of - do
we have a test case for this?
-    if ((!ctx->kernel) || ~(dar & (1ULL << 63)))
+    if ((!ctx->kernel) || !(dar & (1ULL << 63)))
Should it be the top two bits?

-Ian
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