# Re: \[PATCH v5 21/23\] powerpc: Simplify test in \_\_dma\_sync()

- From: Denis Kirjanov \<hidden\>
- Date: 2016-02-04 11:56:04 
- List: linuxppc-dev
- Page: https://ratatoskr.run/linuxppc-dev/2016/02/4677898
- Thread: https://ratatoskr.run/linuxppc-dev/2016/02/4677321/t.md

```text
On 2/4/16, Christophe Leroy [ref] wrote:
> This simplification helps the compiler. We now have only one test
> instead of two, so it reduces the number of branches.
>
> Signed-off-by: Christophe Leroy <redacted>
> ---
> v2: new
> v3: no change
> v4: no change
> v5: no change
>
>  arch/powerpc/mm/dma-noncoherent.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/mm/dma-noncoherent.c
> b/arch/powerpc/mm/dma-noncoherent.c
> index 169aba4..2dc74e5 100644
> --- a/arch/powerpc/mm/dma-noncoherent.c
> +++ b/arch/powerpc/mm/dma-noncoherent.c
> @@ -327,7 +327,7 @@ void __dma_sync(void *vaddr, size_t size, int direction)
>  		 * invalidate only when cache-line aligned otherwise there is
>  		 * the potential for discarding uncommitted data from the cache
>  		 */
> -		if ((start & (L1_CACHE_BYTES - 1)) || (size & (L1_CACHE_BYTES - 1)))
> +		if ((start | end) & (L1_CACHE_BYTES - 1))
>  			flush_dcache_range(start, end);
>  		else
>  			invalidate_dcache_range(start, end);
The previous version of address cache-line aligned check reads perfectly fine.
What's the benefit of this micro optimization?
> --
> 2.1.0
>
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```