Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
.../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 53 ++++++++++++++++++++++
1 file changed, 53 insertions(+)
@@ -69,6 +69,59 @@ Example: }; };+* Interrupt Controller (IC)++Required properties:+- compatible : should be "fsl,qe-ic".+- reg : Address range of IC register set.+- interrupts : interrupts generated by the device.++Example:++ qeic: interrupt-controller@80 {+ interrupt-controller;+ compatible = "fsl,qe-ic";+ #address-cells = <0>;+ #interrupt-cells = <1>;+ reg = <0x80 0x80>;+ interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78+ };++* Serial Interface Block (SI)++The SI manages the routing of eight TDM lines to the QE block serial drivers+, the MCC and the UCCs, for receive and transmit.++Required properties:+- compatible : should be "fsl,qe-si".+- reg : Address range of SI register set.++Example:++ si1: si@700 {+ #address-cells = <1>;+ #size-cells = <0>;+ compatible = "fsl,qe-si";+ reg = <0x700 0x80>;+ };++* Serial Interface Block RAM(SIRAM)++store the routing entries of SI++Required properties:+- compatible : should be "fsl,qe-siram".+- reg : Address range of SI RAM.++Example:++ siram1: siram@1000 {+ #address-cells = <1>;+ #size-cells = <1>;+ compatible = "fsl,qe-siram";+ reg = <0x1000 0x800>;+ };+ * QE Firmware Node This node defines a firmware binary that is embedded in the device tree, for
@@ -0,0 +1,20 @@+* Serial++Currently defined compatibles:+- ucc_uart++Properties for ucc_uart:+device_type : which type the device is+port-number : port number of UCC-UART+rx-clock-name : which clock QE use for RX+tx-clock-name : which clock QE use for TX++Example:++ serial: ucc@2200 {+ device_type = "serial";+ compatible = "ucc_uart";+ port-number = <1>;+ rx-clock-name = "brg2";+ tx-clock-name = "brg2";+ };
@@ -41,3 +41,38 @@ Example: fsl,mdio-pin = <12>; fsl,mdc-pin = <13>; };++* HDLC++Currently defined compatibles:+- fsl,ucc_hdlc++Properties for fsl,ucc_hdlc:+rx-clock-name : which clock QE use for RX+tx-clock-name : which clock QE use for TX+fsl,rx-sync-clock : which pin QE use for RX sync+fsl,tx-sync-clock : which pin QE use for TX sync+fsl,tx-timeslot : tx timeslot+fsl,rx-timeslot : rx timeslot+fsl,tdm-framer-type : tdm framer type+fsl,tdm-mode : tdm mode, normal or internal-loopback+fsl,tdm-id : tdm ID+fsl,siram-entry-id : SI RAM entry ID for the TDM+fsl,tdm-interface : hdlc based on tdm-interface++Example:++ ucc@2000 {+ compatible = "fsl,ucc_hdlc";+ rx-clock-name = "clk8";+ tx-clock-name = "clk9";+ fsl,rx-sync-clock = "rsync_pin";+ fsl,tx-sync-clock = "tsync_pin";+ fsl,tx-timeslot = <0xfffffffe>;+ fsl,rx-timeslot = <0xfffffffe>;+ fsl,tdm-framer-type = "e1";+ fsl,tdm-mode = "normal";+ fsl,tdm-id = <0>;+ fsl,siram-entry-id = <0>;+ fsl,tdm-interface;+ };
+
+Properties for fsl,ucc_hdlc:
+rx-clock-name : which clock QE use for RX
+tx-clock-name : which clock QE use for TX
+fsl,rx-sync-clock : which pin QE use for RX sync
+fsl,tx-sync-clock : which pin QE use for TX sync
+fsl,tx-timeslot : tx timeslot
+fsl,rx-timeslot : rx timeslot
+fsl,tdm-framer-type : tdm framer type
+fsl,tdm-mode : tdm mode, normal or internal-loopback
+fsl,tdm-id : tdm ID
+fsl,siram-entry-id : SI RAM entry ID for the TDM
+fsl,tdm-interface : hdlc based on tdm-interface
It is not clear what any of these properties do. For example, what are
allowed/valid values. Provide enough information to validate the
example.
Rob
+
+Example:
+
+ ucc@2000 {
+ compatible = "fsl,ucc_hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot = <0xfffffffe>;
+ fsl,rx-timeslot = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
--
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@@ -0,0 +1,20 @@+* Serial++Currently defined compatibles:+- ucc_uart++Properties for ucc_uart:+device_type : which type the device is
Drop this please.
+port-number : port number of UCC-UART
Use aliases instead.
+rx-clock-name : which clock QE use for RX
+tx-clock-name : which clock QE use for TX
These should use the clock binding.
+
+Example:
+
+ serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
--
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From: Rob Herring <robh@kernel.org> Date: 2016-01-08 21:02:31
On Fri, Jan 08, 2016 at 10:18:09AM +0800, Zhao Qiang wrote:
quoted hunk
Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
.../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 53 ++++++++++++++++++++++
1 file changed, 53 insertions(+)
@@ -69,6 +69,59 @@ Example: }; };+* Interrupt Controller (IC)++Required properties:+- compatible : should be "fsl,qe-ic".+- reg : Address range of IC register set.+- interrupts : interrupts generated by the device.
Add interrupt-controller, too.
+
+Example:
+
+ qeic: interrupt-controller@80 {
+ interrupt-controller;
+ compatible = "fsl,qe-ic";
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x80 0x80>;
+ interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
+ };
+
+* Serial Interface Block (SI)
+
+The SI manages the routing of eight TDM lines to the QE block serial drivers
+, the MCC and the UCCs, for receive and transmit.
+
+Required properties:
+- compatible : should be "fsl,qe-si".
+- reg : Address range of SI register set.
+
+Example:
+
+ si1: si@700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
Why are these needed? There are no child nodes.
+ compatible = "fsl,qe-si";
+ reg = <0x700 0x80>;
+ };
+
+* Serial Interface Block RAM(SIRAM)
+
+store the routing entries of SI
+
+Required properties:
+- compatible : should be "fsl,qe-siram".
+- reg : Address range of SI RAM.
+
+Example:
+
+ siram1: siram@1000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
ditto.
+ compatible = "fsl,qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
* QE Firmware Node
This node defines a firmware binary that is embedded in the device tree, for
--
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@@ -0,0 +1,20 @@+* Serial++Currently defined compatibles:+- ucc_uart++Properties for ucc_uart:+device_type : which type the device is
=20
Drop this please.
Yes, I will drop it in next version.
=20
quoted
+port-number : port number of UCC-UART
=20
Use aliases instead.
I don't understand, can you explain more?
=20
quoted
+rx-clock-name : which clock QE use for RX tx-clock-name : which clock
+QE use for TX
=20
These should use the clock binding.
This property means which clock source the UCC use,=20
the QE just use this property to route UCC clock to clock source.
The clock source maybe either internal or outside(from clock input pin).
So clock binding is not apply in this case.
=20
quoted
+
+Example:
+
+ serial: ucc@2200 {
+ device_type =3D "serial";
+ compatible =3D "ucc_uart";
+ port-number =3D <1>;
+ rx-clock-name =3D "brg2";
+ tx-clock-name =3D "brg2";
+ };
--
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@@ -0,0 +1,20 @@+* Serial++Currently defined compatibles:+- ucc_uart++Properties for ucc_uart:+device_type : which type the device is
Drop this please.
=20
Yes, I will drop it in next version.
=20
quoted
quoted
+port-number : port number of UCC-UART
Use aliases instead.
=20
I don't understand, can you explain more?
=20
quoted
quoted
+rx-clock-name : which clock QE use for RX tx-clock-name : which
+clock QE use for TX
These should use the clock binding.
=20
This property means which clock source the UCC use, the QE just use this
property to route UCC clock to clock source.
The clock source maybe either internal or outside(from clock input pin).
So clock binding is not apply in this case.
=20
quoted
quoted
+
+Example:
+
+ serial: ucc@2200 {
+ device_type =3D "serial";
+ compatible =3D "ucc_uart";
+ port-number =3D <1>;
+ rx-clock-name =3D "brg2";
+ tx-clock-name =3D "brg2";
+ };
--
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On Fri, Jan 8, 2016 at 10:18 AM, Zhao Qiang [off-list ref] wrote:
Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
As you have submitted patch to move QE code from arch/powerpc into
drivers/soc/fsl for the reuse of ARM and powerpc, you should also
move the binding documents out of the powerpc folder into a more
common place and add new bindings in the new location.
Regards,
Leo
From: Scott Wood <oss@buserror.net> Date: 2016-01-18 23:29:06
On Mon, 2016-01-18 at 09:24 +0000, Qiang Zhao wrote:
On Fri, Jan 18, 2016 at 05:10 PM, Li Yang [off-list ref]wrote:
quoted
-----Original Message-----
From: pku.leo@gmail.com [mailto:pku.leo@gmail.com] On Behalf Of Li Yang
Sent: Monday, January 18, 2016 5:10 PM
To: Qiang Zhao <qiang.zhao@nxp.com>
Cc: devicetree@vger.kernel.org; lkml <redacted>;
linuxppc-dev [off-list ref]; Priyanka.Jain@freescale.com;
oss@buserror.net
Subject: Re: [PATCH 3/6] QE: Add uqe_serial document to bindings
On Fri, Jan 8, 2016 at 10:18 AM, Zhao Qiang [off-list ref] wrote:
quoted
Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
As you have submitted patch to move QE code from arch/powerpc into
drivers/soc/fsl for the reuse of ARM and powerpc, you should also move
the
binding documents out of the powerpc folder into a more common place and
add new bindings in the new location.
Thank you for your recommendation.
How about create a new directory named qe under
"Documentation/devicetree/bindings/"?
Or you have a better suggestion?