From: Nicolin Chen <redacted>
SAI supports these operation modes:
1) asynchronous mode
Both Tx and Rx are set to be asynchronous.
2) synchronous mode (Rx sync with Tx)
Tx is set to be asynchronous, Rx is set to be synchronous.
3) synchronous mode (Tx sync with Rx)
Rx is set to be asynchronous, Tx is set to be synchronous.
4) synchronous mode (Tx/Rx sync with another SAI's Tx)
5) synchronous mode (Tx/Rx sync with another SAI's Rx)
* 4) and 5) are beyond this patch because they are related with another SAI.
As the initial version of this SAI driver, it supported 2) as default while
the others were totally missing.
So this patch just adds supports for 1) and 3).
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
---
.../devicetree/bindings/sound/fsl-sai.txt | 16 ++++++++++++
sound/soc/fsl/fsl_sai.c | 30 +++++++++++++++++++---
sound/soc/fsl/fsl_sai.h | 4 +++
3 files changed, 46 insertions(+), 4 deletions(-)
@@ -24,6 +24,22 @@ Required properties: - big-endian-data: If this property is absent, the little endian mode will be in use as default, or the big endian mode will be in use for all the fifo data.+- fsl,sai-synchronous-rx: This is a boolean property. If present, indicating+ that SAI will work in the synchronous mode (sync Tx with Rx) which means+ both the transimitter and receiver will send and receive data by following+ receiver's bit clocks and frame sync clocks.+- fsl,sai-asynchronous: This is a boolean property. If present, indicating+ that SAI will work in the asynchronous mode, which means both transimitter+ and receiver will send and receive data by following their own bit clocks+ and frame sync clocks separately.++Note:+- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the+ default synchronous mode (sync Rx with Tx) will be used, which means both+ transimitter and receiver will send and receive data by following clocks+ of transimitter.+- fsl,sai-asynchronous will be ignored if fsl,sai-synchronous-rx property is+ already present. Example: sai2: sai@40031000 {
@@ -330,12 +330,14 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,u32xcsr,count=100;/*-*Thetransmitterbitclockandframesyncaretobe-*usedbyboththetransmitterandreceiver.+*Asynchronousmode:ClearSYNCforbothTxandRx.+*RxsyncwithTxclocks:ClearSYNCforTx,setitforRx.+*TxsyncwithRxclocks:ClearSYNCforRx,setitforTx.*/-regmap_update_bits(sai->regmap,FSL_SAI_TCR2,FSL_SAI_CR2_SYNC,0);+regmap_update_bits(sai->regmap,FSL_SAI_TCR2,FSL_SAI_CR2_SYNC,+sai->synchronous[TX]?FSL_SAI_CR2_SYNC:0);regmap_update_bits(sai->regmap,FSL_SAI_RCR2,FSL_SAI_CR2_SYNC,-FSL_SAI_CR2_SYNC);+sai->synchronous[RX]?FSL_SAI_CR2_SYNC:0);/**Itisrecommendedthatthetransmitteristhelastenabled
@@ -620,6 +622,26 @@ static int fsl_sai_probe(struct platform_device *pdev)returnret;}+/* Sync Tx with Rx as default by following old DT binding */+sai->synchronous[RX]=true;+sai->synchronous[TX]=false;+fsl_sai_dai.symmetric_rates=1;+fsl_sai_dai.symmetric_channels=1;+fsl_sai_dai.symmetric_samplebits=1;++if(of_find_property(np,"fsl,sai-synchronous-rx",NULL)){+/* Sync Rx with Tx */+sai->synchronous[RX]=false;+sai->synchronous[TX]=true;+}elseif(of_find_property(np,"fsl,sai-asynchronous",NULL)){+/* Discard all settings for asynchronous mode */+sai->synchronous[RX]=false;+sai->synchronous[TX]=false;+fsl_sai_dai.symmetric_rates=0;+fsl_sai_dai.symmetric_channels=0;+fsl_sai_dai.symmetric_samplebits=0;+}+sai->dma_params_rx.addr=res->start+FSL_SAI_RDR;sai->dma_params_tx.addr=res->start+FSL_SAI_TDR;sai->dma_params_rx.maxburst=FSL_SAI_MAXBURST_RX;
From: Nicolin Chen <redacted>
SAI supports these operation modes:
1) asynchronous mode
Both Tx and Rx are set to be asynchronous.
2) synchronous mode (Rx sync with Tx)
Tx is set to be asynchronous, Rx is set to be synchronous.
3) synchronous mode (Tx sync with Rx)
Rx is set to be asynchronous, Tx is set to be synchronous.
4) synchronous mode (Tx/Rx sync with another SAI's Tx)
5) synchronous mode (Tx/Rx sync with another SAI's Rx)
* 4) and 5) are beyond this patch because they are related with another SAI.
As the initial version of this SAI driver, it supported 2) as default while
the others were totally missing.
So this patch just adds supports for 1) and 3).
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
---
.../devicetree/bindings/sound/fsl-sai.txt | 16 ++++++++++++
sound/soc/fsl/fsl_sai.c | 30 +++++++++++++++++++---
sound/soc/fsl/fsl_sai.h | 4 +++
3 files changed, 46 insertions(+), 4 deletions(-)
@@ -24,6 +24,22 @@ Required properties: - big-endian-data: If this property is absent, the little endian mode will be in use as default, or the big endian mode will be in use for all the fifo data.+- fsl,sai-synchronous-rx: This is a boolean property. If present, indicating+ that SAI will work in the synchronous mode (sync Tx with Rx) which means+ both the transimitter and receiver will send and receive data by following+ receiver's bit clocks and frame sync clocks.+- fsl,sai-asynchronous: This is a boolean property. If present, indicating+ that SAI will work in the asynchronous mode, which means both transimitter+ and receiver will send and receive data by following their own bit clocks+ and frame sync clocks separately.
Would be readable if it like this...
fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
that SAI will work in the synchronous mode (sync Tx with Rx) which means
both the transimitter and receiver will send and receive data by following
receiver's bit clocks and frame sync clocks.
- fsl,sai-asynchronous: This is a boolean property. If present, indicating
that SAI will work in the asynchronous mode, which means both transimitter
and receiver will send and receive data by following their own bit clocks
and frame sync clocks separately.
.....
--
Regards,
Varka Bhadram.
@@ -24,6 +24,22 @@ Required properties: - big-endian-data: If this property is absent, the little endian mode will be in use as default, or the big endian mode will be in use for all the fifo data.+- fsl,sai-synchronous-rx: This is a boolean property. If present, indicating+ that SAI will work in the synchronous mode (sync Tx with Rx) which means+ both the transimitter and receiver will send and receive data by following+ receiver's bit clocks and frame sync clocks.+- fsl,sai-asynchronous: This is a boolean property. If present, indicating+ that SAI will work in the asynchronous mode, which means both transimitter+ and receiver will send and receive data by following their own bit clocks+ and frame sync clocks separately.
Would be readable if it like this...
fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
that SAI will work in the synchronous mode (sync Tx with Rx) which means
both the transimitter and receiver will send and receive data by following
receiver's bit clocks and frame sync clocks.
- fsl,sai-asynchronous: This is a boolean property. If present, indicating
that SAI will work in the asynchronous mode, which means both transimitter
and receiver will send and receive data by following their own bit clocks
and frame sync clocks separately.
I agree, however, the doc was initialized in that format. Adding
indentations for these two appended lines makes the whole text
look weird. :(
Thank you,
Nicolin
@@ -24,6 +24,22 @@ Required properties: - big-endian-data: If this property is absent, the little endian mode will be in use as default, or the big endian mode will be in use for all the fifo data.+- fsl,sai-synchronous-rx: This is a boolean property. If present, indicating+ that SAI will work in the synchronous mode (sync Tx with Rx) which means+ both the transimitter and receiver will send and receive data by following+ receiver's bit clocks and frame sync clocks.+- fsl,sai-asynchronous: This is a boolean property. If present, indicating+ that SAI will work in the asynchronous mode, which means both transimitter+ and receiver will send and receive data by following their own bit clocks+ and frame sync clocks separately.
Would be readable if it like this...
fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
that SAI will work in the synchronous mode (sync Tx with Rx) which means
both the transimitter and receiver will send and receive data by following
receiver's bit clocks and frame sync clocks.
- fsl,sai-asynchronous: This is a boolean property. If present, indicating
that SAI will work in the asynchronous mode, which means both transimitter
and receiver will send and receive data by following their own bit clocks
and frame sync clocks separately.
I agree, however, the doc was initialized in that format. Adding
indentations for these two appended lines makes the whole text
look weird. :(
@@ -24,6 +24,22 @@ Required properties: - big-endian-data: If this property is absent, the little endian mode will be in use as default, or the big endian mode will be in use for all the fifo data.+- fsl,sai-synchronous-rx: This is a boolean property. If present, indicating+ that SAI will work in the synchronous mode (sync Tx with Rx) which means+ both the transimitter and receiver will send and receive data by following+ receiver's bit clocks and frame sync clocks.+- fsl,sai-asynchronous: This is a boolean property. If present, indicating+ that SAI will work in the asynchronous mode, which means both transimitter+ and receiver will send and receive data by following their own bit clocks+ and frame sync clocks separately.
Would be readable if it like this...
fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
that SAI will work in the synchronous mode (sync Tx with Rx) which means
both the transimitter and receiver will send and receive data by following
receiver's bit clocks and frame sync clocks.
- fsl,sai-asynchronous: This is a boolean property. If present, indicating
that SAI will work in the asynchronous mode, which means both transimitter
and receiver will send and receive data by following their own bit clocks
and frame sync clocks separately.
I agree, however, the doc was initialized in that format. Adding
indentations for these two appended lines makes the whole text
look weird. :(
I know how to write a binding doc with indentations to make it clear.
What I'm talking about is that the doc was created without indentations,
so I don't feel comfortable to add indentations starting from this patch
while leaving the old lines in totally a different style because It's not
helpful to make people read comfortably at all but only forcing people to
think why these two lines are so special to take some steps back here.
So personally I agree with your idea to make doc more readable. But what
I prefer to do is not having a conversation on the style within this patch
but to create an extra style-refinement patch later after this one.
Let's just focus on the function itself right now. We can later send a
patch to refine this entire doc. Won't you think it's a better idea? :)
Thank you
Nicolin
I know how to write a binding doc with indentations to make it clear.
What I'm talking about is that the doc was created without indentations,
so I don't feel comfortable to add indentations starting from this patch
while leaving the old lines in totally a different style because It's not
helpful to make people read comfortably at all but only forcing people to
think why these two lines are so special to take some steps back here.
So personally I agree with your idea to make doc more readable. But what
I prefer to do is not having a conversation on the style within this patch
but to create an extra style-refinement patch later after this one.
From: Mark Brown <broonie@kernel.org> Date: 2014-08-07 09:45:48
On Tue, Aug 05, 2014 at 03:32:05PM +0800, Nicolin Chen wrote:
From: Nicolin Chen <redacted>
SAI supports these operation modes:
1) asynchronous mode
Both Tx and Rx are set to be asynchronous.
2) synchronous mode (Rx sync with Tx)
Tx is set to be asynchronous, Rx is set to be synchronous.
3) synchronous mode (Tx sync with Rx)
Rx is set to be asynchronous, Tx is set to be synchronous.
4) synchronous mode (Tx/Rx sync with another SAI's Tx)
5) synchronous mode (Tx/Rx sync with another SAI's Rx)
This seems to conflict with something else on my branch - not checked
what. Can you take a look please?
+Note:
+- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
+ default synchronous mode (sync Rx with Tx) will be used, which means both
+ transimitter and receiver will send and receive data by following clocks
+ of transimitter.
+- fsl,sai-asynchronous will be ignored if fsl,sai-synchronous-rx property is
+ already present.
On Thu, Aug 07, 2014 at 10:45:27AM +0100, Mark Brown wrote:
On Tue, Aug 05, 2014 at 03:32:05PM +0800, Nicolin Chen wrote:
quoted
From: Nicolin Chen <redacted>
SAI supports these operation modes:
1) asynchronous mode
Both Tx and Rx are set to be asynchronous.
2) synchronous mode (Rx sync with Tx)
Tx is set to be asynchronous, Rx is set to be synchronous.
3) synchronous mode (Tx sync with Rx)
Rx is set to be asynchronous, Tx is set to be synchronous.
4) synchronous mode (Tx/Rx sync with another SAI's Tx)
5) synchronous mode (Tx/Rx sync with another SAI's Rx)
This seems to conflict with something else on my branch - not checked
what. Can you take a look please?
+Note:
+- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
+ default synchronous mode (sync Rx with Tx) will be used, which means both
+ transimitter and receiver will send and receive data by following clocks
+ of transimitter.
+- fsl,sai-asynchronous will be ignored if fsl,sai-synchronous-rx property is
+ already present.