Re: [PATCH] clk: corenet: Update the clock bindings
From: Scott Wood <hidden>
Date: 2014-01-24 02:47:44
On Thu, 2014-01-23 at 20:46 -0600, Tang Yuantian-B29983 wrote:
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-----Original Message----- From: Wood Scott-B07421 Sent: 2014年1月24日 星期五 10:36 To: Tang Yuantian-B29983 Cc: galak@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; Kushwaha Prabhakar-B32579 Subject: Re: [PATCH] clk: corenet: Update the clock bindings On Thu, 2014-01-23 at 20:33 -0600, Tang Yuantian-B29983 wrote:quoted
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Instead, how about a note like this near the top of the file: All references to "1.0" and "2.0" refer to the QorIQ chassis version to which the chip complies. Chassis Version Example Chips --------------- ------------- 1.0 p4080, p5020, p5040 2.0 t4240, b4860, t1040Better, I will update.quoted
BTW, this binding and the associated driver really should be called "qoriq-clock", not "corenet-clock". This would match the compatible string, and it doesn't really have much to do with corenet (which is part of the QorIQ chassis v1 and v2, but not *this* part). Do you know if the chassis v3 clock interface will be similar enough toshare a driver?quoted
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Doesn't QorIQ include some low-end socs, like p1022, p1020?Yes, but those aren't "QorIQ Chassis 1.0" or "QorIQ Chassis 2.0". They're mpc85xx-family chips. In any case, if "qoriq" makes sense for the compatible, I don't see why it doesn't make sense for the driver.So, "Corenet" is appropriate for driver. If something should change, that must be compatible string.No. Corenet is a bus interconnect, not a chip family (despite abuse of the name in other contexts in Linux/U-Boot). And the binding with qoriq has already been accepted.QorIQ is not the best name either since it include the low-end socs. What the name should be?
Again, those low-end chips do not implement "QorIQ Chassis 1.0" or "QorIQ Chassis 2.0". That they have "QorIQ" in their name is irrelevant. -Scott