From: Bharat Bhushan <redacted>
First patch is a typo fix where book3e define _PAGE_LENDIAN while it
should be defined as _PAGE_ENDIAN. This seems to show that this is never exercised :-)
Second and third patch is to allow guest controlling "G"-Guarded and "E"-Endian TLB attributes respectively.
Fourth patch is moving functions/logic in common code so they can be used on booke also.
Fifth and Sixth patch is actually setting caching attributes (TLB.WIMGE) using corresponding Linux pte.
v3->v5
- Fix tlb-reference-flag clearing issue (patch 4/6)
- There was a patch (4/6 powerpc: move linux pte/hugepte search to more generic file)
in the last series of this patchset which was moving pte/hugepte search functions to
generic file. That patch is no more needed as some other patch is already applied to fix that :)
v2->v3
- now lookup_linux_pte() only have pte search logic and it does not
set any access flags in pte. There is already a function for setting
access flag which will be called explicitly where needed.
On booke we only need to search for pte to get WIMG.
v1->v2
- Earlier caching attributes (WIMGE) were set based of page is RAM or not
But now we get these attributes from corresponding Linux PTE.
Bharat Bhushan (6):
powerpc: book3e: _PAGE_LENDIAN must be _PAGE_ENDIAN
kvm: powerpc: allow guest control "E" attribute in mas2
kvm: powerpc: allow guest control "G" attribute in mas2
kvm: powerpc: keep only pte search logic in lookup_linux_pte
kvm: booke: clear host tlb reference flag on guest tlb invalidation
kvm: powerpc: use caching attributes as per linux pte
arch/powerpc/include/asm/kvm_host.h | 2 +-
arch/powerpc/include/asm/pgtable.h | 24 ++++++++++++++++
arch/powerpc/include/asm/pte-book3e.h | 2 +-
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 36 ++++++++----------------
arch/powerpc/kvm/booke.c | 2 +-
arch/powerpc/kvm/e500.h | 10 ++++--
arch/powerpc/kvm/e500_mmu_host.c | 50 +++++++++++++++++++--------------
7 files changed, 74 insertions(+), 52 deletions(-)
For booke3e _PAGE_ENDIAN is not defined. Infact what is defined
is "_PAGE_LENDIAN" which is wrong and that should be _PAGE_ENDIAN.
There are no compilation errors as
arch/powerpc/include/asm/pte-common.h defines _PAGE_ENDIAN to 0
as it is not defined anywhere.
Signed-off-by: Bharat Bhushan <redacted>
---
v1->v5
- no change
arch/powerpc/include/asm/pte-book3e.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
"E" bit in MAS2 bit indicates whether the page is accessed
in Little-Endian or Big-Endian byte order.
There is no reason to stop guest setting "E", so allow him."
Signed-off-by: Bharat Bhushan <redacted>
---
v1->v5
- no change
arch/powerpc/kvm/e500.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
"G" bit in MAS2 indicates whether the page is Guarded.
There is no reason to stop guest setting "G", so allow him.
Signed-off-by: Bharat Bhushan <redacted>
---
v1->v5
- no change
arch/powerpc/kvm/e500.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
lookup_linux_pte() was searching for a pte and also sets access
flags is writable. This function now searches only pte while
access flag setting is done explicitly.
This pte lookup is not kvm specific, so moved to common code (asm/pgtable.h)
My Followup patch will use this on booke.
Signed-off-by: Bharat Bhushan <redacted>
---
v4->v5
- No change
arch/powerpc/include/asm/pgtable.h | 24 +++++++++++++++++++++++
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 36 +++++++++++-----------------------
2 files changed, 36 insertions(+), 24 deletions(-)
@@ -173,6 +154,7 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,unsignedlongis_io;unsignedlong*rmap;pte_tpte;+pte_t*ptep;unsignedintwriting;unsignedlongmmu_seq;unsignedlongrcbits;
@@ -231,8 +213,9 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,/* Look up the Linux PTE for the backing page */pte_size=psize;-pte=lookup_linux_pte(pgdir,hva,writing,&pte_size);-if(pte_present(pte)){+ptep=lookup_linux_pte(pgdir,hva,&pte_size);+if(pte_present(pte_val(*ptep))){+pte=kvmppc_read_update_linux_pte(ptep,writing);if(writing&&!pte_write(pte))/* make the actual HPTE be read-only */ptel=hpte_make_readonly(ptel);
@@ -661,15 +644,20 @@ long kvmppc_h_protect(struct kvm_vcpu *vcpu, unsigned long flags,structkvm_memory_slot*memslot;pgd_t*pgdir=vcpu->arch.pgdir;pte_tpte;+pte_t*ptep;psize=hpte_page_size(v,r);gfn=((r&HPTE_R_RPN)&~(psize-1))>>PAGE_SHIFT;memslot=__gfn_to_memslot(kvm_memslots(kvm),gfn);if(memslot){hva=__gfn_to_hva_memslot(memslot,gfn);-pte=lookup_linux_pte(pgdir,hva,1,&psize);-if(pte_present(pte)&&!pte_write(pte))-r=hpte_make_readonly(r);+ptep=lookup_linux_pte(pgdir,hva,&psize);+if(pte_present(pte_val(*ptep))){+pte=kvmppc_read_update_linux_pte(ptep,+1);+if(pte_present(pte)&&!pte_write(pte))+r=hpte_make_readonly(r);+}}}}
On booke, "struct tlbe_ref" contains host tlb mapping information
(pfn: for guest-pfn to pfn, flags: attribute associated with this mapping)
for a guest tlb entry. So when a guest creates a TLB entry then
"struct tlbe_ref" is set to point to valid "pfn" and set attributes in
"flags" field of the above said structure. When a guest TLB entry is
invalidated then flags field of corresponding "struct tlbe_ref" is
updated to point that this is no more valid, also we selectively clear
some other attribute bits, example: if E500_TLB_BITMAP was set then we clear
E500_TLB_BITMAP, if E500_TLB_TLB0 is set then we clear this.
Ideally we should clear complete "flags" as this entry is invalid and does not
have anything to re-used. The other part of the problem is that when we use
the same entry again then also we do not clear (started doing or-ing etc).
So far it was working because the selectively clearing mentioned above
actually clears "flags" what was set during TLB mapping. But the problem
starts coming when we add more attributes to this then we need to selectively
clear them and which is not needed.
This patch we do both
- Clear "flags" when invalidating;
- Clear "flags" when reusing same entry later
Signed-off-by: Bharat Bhushan <redacted>
---
v3-> v5
- New patch (found this issue when doing vfio-pci development)
arch/powerpc/kvm/e500_mmu_host.c | 12 +++++++-----
1 files changed, 7 insertions(+), 5 deletions(-)
@@ -217,7 +217,8 @@ void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,}mb();vcpu_e500->g2h_tlb1_map[esel]=0;-ref->flags&=~(E500_TLB_BITMAP|E500_TLB_VALID);+/* Clear flags as TLB is not backed by the host anymore */+ref->flags=0;local_irq_restore(flags);}
@@ -227,7 +228,8 @@ void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,*rarelyandisnotworthoptimizing.Invalidateeverything.*/kvmppc_e500_tlbil_all(vcpu_e500);-ref->flags&=~(E500_TLB_TLB0|E500_TLB_VALID);+/* Clear flags as TLB is not backed by the host anymore */+ref->flags=0;}/* Already invalidated in between */
@@ -237,8 +239,8 @@ void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,/* Guest tlbe is backed by at most one host tlbe per shadow pid. */kvmppc_e500_tlbil_one(vcpu_e500,gtlbe);-/* Mark the TLB as not backed by the host anymore */-ref->flags&=~E500_TLB_VALID;+/* Clear flags as TLB is not backed by the host anymore */+ref->flags=0;}staticinlineinttlbe_is_writable(structkvm_book3e_206_tlb_entry*tlbe)
KVM uses same WIM tlb attributes as the corresponding qemu pte.
For this we now search the linux pte for the requested page and
get these cache caching/coherency attributes from pte.
Signed-off-by: Bharat Bhushan <redacted>
---
v4->v5
- No change
arch/powerpc/include/asm/kvm_host.h | 2 +-
arch/powerpc/kvm/booke.c | 2 +-
arch/powerpc/kvm/e500.h | 8 ++++--
arch/powerpc/kvm/e500_mmu_host.c | 38 ++++++++++++++++++++--------------
4 files changed, 29 insertions(+), 21 deletions(-)
@@ -250,10 +241,12 @@ static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)staticinlinevoidkvmppc_e500_ref_setup(structtlbe_ref*ref,structkvm_book3e_206_tlb_entry*gtlbe,-pfn_tpfn)+pfn_tpfn,unsignedintwimg){ref->pfn=pfn;ref->flags=E500_TLB_VALID;+/* Use guest supplied MAS2_G and MAS2_E */+ref->flags|=(gtlbe->mas2&MAS2_ATTRIB_MASK)|wimg;if(tlbe_is_writable(gtlbe))kvm_set_pfn_dirty(pfn);
@@ -314,8 +307,7 @@ static void kvmppc_e500_setup_stlbe(/* Force IPROT=0 for all guest mappings. */stlbe->mas1=MAS1_TSIZE(tsize)|get_tlb_sts(gtlbe)|MAS1_VALID;-stlbe->mas2=(gvaddr&MAS2_EPN)|-e500_shadow_mas2_attrib(gtlbe->mas2,pr);+stlbe->mas2=(gvaddr&MAS2_EPN)|(ref->flags&E500_TLB_MAS2_ATTR);stlbe->mas7_3=((u64)pfn<<PAGE_SHIFT)|e500_shadow_mas3_attrib(gtlbe->mas7_3,pr);
@@ -334,6 +326,10 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,unsignedlonghva;intpfnmap=0;inttsize=BOOK3E_PAGESZ_4K;+unsignedlongtsize_pages=0;+pte_t*ptep;+unsignedintwimg=0;+pgd_t*pgdir;/**Translateguestphysicaltotruephysical,acquiring
@@ -396,7 +392,7 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,*/for(;tsize>BOOK3E_PAGESZ_4K;tsize-=2){-unsignedlonggfn_start,gfn_end,tsize_pages;+unsignedlonggfn_start,gfn_end;tsize_pages=1<<(tsize-2);gfn_start=gfn&~(tsize_pages-1);
@@ -438,9 +434,10 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,}if(likely(!pfnmap)){-unsignedlongtsize_pages=1<<(tsize+10-PAGE_SHIFT);+tsize_pages=1<<(tsize+10-PAGE_SHIFT);+pfn=gfn_to_pfn_memslot(slot,gfn);-if(is_error_noslot_pfn(pfn)){+if(is_error_noslot_pfn(pfn)&&printk_ratelimit()){printk(KERN_ERR"Couldn't get real page for gfn %lx!\n",(long)gfn);return-EINVAL;
@@ -451,7 +448,16 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,gvaddr&=~((tsize_pages<<PAGE_SHIFT)-1);}-kvmppc_e500_ref_setup(ref,gtlbe,pfn);+pgdir=vcpu_e500->vcpu.arch.pgdir;+ptep=lookup_linux_pte(pgdir,hva,&tsize_pages);+if(pte_present(*ptep)){+wimg=(pte_val(*ptep)>>PTE_WIMGE_SHIFT)&MAS2_WIMGE_MASK;+}elseif(printk_ratelimit()){+printk(KERN_ERR"%s: pte not present: gfn %lx, pfn %lx\n",+__func__,(long)gfn,pfn);+return-EINVAL;+}+kvmppc_e500_ref_setup(ref,gtlbe,pfn,wimg);kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu,gtlbe,tsize,ref,gvaddr,stlbe);
From: Scott Wood <hidden> Date: 2013-09-19 21:08:18
On Thu, 2013-09-19 at 11:32 +0530, Bharat Bhushan wrote:
quoted hunk
On booke, "struct tlbe_ref" contains host tlb mapping information
(pfn: for guest-pfn to pfn, flags: attribute associated with this mapping)
for a guest tlb entry. So when a guest creates a TLB entry then
"struct tlbe_ref" is set to point to valid "pfn" and set attributes in
"flags" field of the above said structure. When a guest TLB entry is
invalidated then flags field of corresponding "struct tlbe_ref" is
updated to point that this is no more valid, also we selectively clear
some other attribute bits, example: if E500_TLB_BITMAP was set then we clear
E500_TLB_BITMAP, if E500_TLB_TLB0 is set then we clear this.
Ideally we should clear complete "flags" as this entry is invalid and does not
have anything to re-used. The other part of the problem is that when we use
the same entry again then also we do not clear (started doing or-ing etc).
So far it was working because the selectively clearing mentioned above
actually clears "flags" what was set during TLB mapping. But the problem
starts coming when we add more attributes to this then we need to selectively
clear them and which is not needed.
This patch we do both
- Clear "flags" when invalidating;
- Clear "flags" when reusing same entry later
Signed-off-by: Bharat Bhushan <redacted>
---
v3-> v5
- New patch (found this issue when doing vfio-pci development)
arch/powerpc/kvm/e500_mmu_host.c | 12 +++++++-----
1 files changed, 7 insertions(+), 5 deletions(-)
@@ -217,7 +217,8 @@ void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,}mb();vcpu_e500->g2h_tlb1_map[esel]=0;-ref->flags&=~(E500_TLB_BITMAP|E500_TLB_VALID);+/* Clear flags as TLB is not backed by the host anymore */+ref->flags=0;local_irq_restore(flags);}
This breaks when you have both E500_TLB_BITMAP and E500_TLB_TLB0 set.
Instead, just convert the final E500_TLB_VALID clearing at the end into
ref->flags = 0, and convert the early return a few lines earlier into
conditional execution of the tlbil_one().
-Scott
From: Scott Wood <hidden> Date: 2013-09-20 16:19:08
On Thu, 2013-09-19 at 23:19 -0500, Bhushan Bharat-R65777 wrote:
quoted
-----Original Message-----
From: Wood Scott-B07421
Sent: Friday, September 20, 2013 2:38 AM
To: Bhushan Bharat-R65777
Cc: benh@kernel.crashing.org; agraf@suse.de; paulus@samba.org;
kvm@vger.kernel.org; kvm-ppc@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
Bhushan Bharat-R65777
Subject: Re: [PATCH 5/6 v5] kvm: booke: clear host tlb reference flag on guest
tlb invalidation
This breaks when you have both E500_TLB_BITMAP and E500_TLB_TLB0 set.
I do not see any case where we set both E500_TLB_BITMAP and
E500_TLB_TLB0.
This would happen if you have a guest TLB1 entry that is backed by some
4K pages and some larger pages (e.g. if the guest maps CCSR with one big
TLB1 and there are varying I/O passthrough regions mapped). It's not
common, but it's possible.
Also we have not optimized that yet (keeping track of
multiple shadow TLB0 entries for one guest TLB1 entry)
This is about correctness, not optimization.
We uses these bit flags only for TLB1 and if size of stlbe is 4K then
we set E500_TLB_TLB0 otherwise we set E500_TLB_BITMAP. Although I
think that E500_TLB_BITMAP should be set only if stlbe size is less
than gtlbe size.
Why? Even if there's only one bit set in the map, we need it to keep
track of which entry was used.
-Scott
From: Scott Wood <hidden> Date: 2013-09-20 18:08:20
On Fri, 2013-09-20 at 13:04 -0500, Bhushan Bharat-R65777 wrote:
quoted
-----Original Message-----
From: Wood Scott-B07421
Sent: Friday, September 20, 2013 9:48 PM
To: Bhushan Bharat-R65777
Cc: Wood Scott-B07421; benh@kernel.crashing.org; agraf@suse.de;
paulus@samba.org; kvm@vger.kernel.org; kvm-ppc@vger.kernel.org; linuxppc-
dev@lists.ozlabs.org
Subject: Re: [PATCH 5/6 v5] kvm: booke: clear host tlb reference flag on guest
tlb invalidation
On Thu, 2013-09-19 at 23:19 -0500, Bhushan Bharat-R65777 wrote:
quoted
We uses these bit flags only for TLB1 and if size of stlbe is 4K then
we set E500_TLB_TLB0 otherwise we set E500_TLB_BITMAP. Although I
think that E500_TLB_BITMAP should be set only if stlbe size is less
than gtlbe size.
Why? Even if there's only one bit set in the map, we need it to keep track of
which entry was used.
If there is one entry then will not this be simple/faster to not lookup bitmap and guest->host array?
A flag indicate it is 1:1 map and this is physical address.
The difference would be negligible, and you'd have added overhead (both
runtime and complexity) of making this a special case.
-Scott
From: Alexander Graf <hidden> Date: 2013-10-04 13:27:22
On 19.09.2013, at 08:02, Bharat Bhushan wrote:
lookup_linux_pte() was searching for a pte and also sets access
flags is writable. This function now searches only pte while
access flag setting is done explicitly.
=20
This pte lookup is not kvm specific, so moved to common code =
(asm/pgtable.h)
My Followup patch will use this on booke.
=20
Signed-off-by: Bharat Bhushan <redacted>
---
v4->v5
- No change
=20
arch/powerpc/include/asm/pgtable.h | 24 +++++++++++++++++++++++
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 36 =
@@ -223,6 +223,30 @@ extern int gup_hugepte(pte_t *ptep, unsigned long =
sz, unsigned long addr,
#endif
pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea,
unsigned *shift);
+
+static inline pte_t *lookup_linux_pte(pgd_t *pgdir, unsigned long =
hva,
+ unsigned long *pte_sizep)
+{
+ pte_t *ptep;
+ unsigned long ps =3D *pte_sizep;
+ unsigned int shift;
+
+ ptep =3D find_linux_pte_or_hugepte(pgdir, hva, &shift);
+ if (!ptep)
+ return __pte(0);
This returns a struct pte_t, but your return value of the function is a =
struct pte_t *. So this code will fail compiling with =
STRICT_MM_TYPECHECKS set. Any reason you don't just return NULL here?
That way callers could simply check on if (ptep) ... or you leave the =
return value as struct pte_t.
Alex
if (memslot) {
hva =3D __gfn_to_hva_memslot(memslot, =
gfn);
- pte =3D lookup_linux_pte(pgdir, hva, 1, =
&psize);
- if (pte_present(pte) && !pte_write(pte))
- r =3D hpte_make_readonly(r);
+ ptep =3D lookup_linux_pte(pgdir, hva, =
&psize);
+ if (pte_present(pte_val(*ptep))) {
+ pte =3D =
kvmppc_read_update_linux_pte(ptep,
+ =
1);
+ if (pte_present(pte) && =
!pte_write(pte))
+ r =3D =
hpte_make_readonly(r);
+ }
}
}
}
--=20
1.7.0.4
=20
=20
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-----Original Message-----
From: Alexander Graf [mailto:agraf@suse.de]
Sent: Friday, October 04, 2013 6:57 PM
To: Bhushan Bharat-R65777
Cc: benh@kernel.crashing.org; paulus@samba.org; kvm@vger.kernel.org; kvm-
ppc@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Bh=
ushan
Bharat-R65777
Subject: Re: [PATCH 4/6 v5] kvm: powerpc: keep only pte search logic in
lookup_linux_pte
=20
=20
On 19.09.2013, at 08:02, Bharat Bhushan wrote:
=20
quoted
lookup_linux_pte() was searching for a pte and also sets access flags
is writable. This function now searches only pte while access flag
setting is done explicitly.
This pte lookup is not kvm specific, so moved to common code
(asm/pgtable.h) My Followup patch will use this on booke.
Signed-off-by: Bharat Bhushan <redacted>
---
v4->v5
- No change
arch/powerpc/include/asm/pgtable.h | 24 +++++++++++++++++++++++
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 36 +++++++++++-----------------=
unlock_rmap(rmap);
}
-static pte_t lookup_linux_pte(pgd_t *pgdir, unsigned long hva,
- int writing, unsigned long *pte_sizep)
-{
- pte_t *ptep;
- unsigned long ps =3D *pte_sizep;
- unsigned int hugepage_shift;
-
- ptep =3D find_linux_pte_or_hugepte(pgdir, hva, &hugepage_shift);
- if (!ptep)
- return __pte(0);
- if (hugepage_shift)
- *pte_sizep =3D 1ul << hugepage_shift;
- else
- *pte_sizep =3D PAGE_SIZE;
- if (ps > *pte_sizep)
- return __pte(0);
- return kvmppc_read_update_linux_pte(ptep, writing, hugepage_shift);
-}
-
static inline void unlock_hpte(unsigned long *hpte, unsigned long
hpte_v) {
asm volatile(PPC_RELEASE_BARRIER "" : : : "memory"); @@ -173,6 +154,7
@@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,
unsigned long is_io;
unsigned long *rmap;
pte_t pte;
+ pte_t *ptep;
unsigned int writing;
unsigned long mmu_seq;
unsigned long rcbits;
@@ -231,8 +213,9 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned
long flags,
/* Look up the Linux PTE for the backing page */
pte_size =3D psize;
- pte =3D lookup_linux_pte(pgdir, hva, writing, &pte_size);
- if (pte_present(pte)) {
+ ptep =3D lookup_linux_pte(pgdir, hva, &pte_size);
+ if (pte_present(pte_val(*ptep))) {
+ pte =3D kvmppc_read_update_linux_pte(ptep, writing);
if (writing && !pte_write(pte))
/* make the actual HPTE be read-only */
ptel =3D hpte_make_readonly(ptel);
@@ -661,15 +644,20 @@ long kvmppc_h_protect(struct kvm_vcpu *vcpu, unsi=
gned
long flags,
quoted
struct kvm_memory_slot *memslot;
pgd_t *pgdir =3D vcpu->arch.pgdir;
pte_t pte;
+ pte_t *ptep;
psize =3D hpte_page_size(v, r);
gfn =3D ((r & HPTE_R_RPN) & ~(psize - 1)) >> PAGE_SHIFT;
memslot =3D __gfn_to_memslot(kvm_memslots(kvm), gfn);
if (memslot) {
hva =3D __gfn_to_hva_memslot(memslot, gfn);
- pte =3D lookup_linux_pte(pgdir, hva, 1, &psize);
- if (pte_present(pte) && !pte_write(pte))
- r =3D hpte_make_readonly(r);
+ ptep =3D lookup_linux_pte(pgdir, hva, &psize);
+ if (pte_present(pte_val(*ptep))) {
+ pte =3D kvmppc_read_update_linux_pte(ptep,
+ 1);
+ if (pte_present(pte) && !pte_write(pte))
+ r =3D hpte_make_readonly(r);
+ }
}
}
}
--
1.7.0.4
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From: Alexander Graf <hidden> Date: 2013-10-04 14:03:55
On 19.09.2013, at 08:02, Bharat Bhushan wrote:
From: Bharat Bhushan <redacted>
=20
First patch is a typo fix where book3e define _PAGE_LENDIAN while it
should be defined as _PAGE_ENDIAN. This seems to show that this is =
never exercised :-)
=20
Second and third patch is to allow guest controlling "G"-Guarded and =
"E"-Endian TLB attributes respectively.
=20
Fourth patch is moving functions/logic in common code so they can be =
used on booke also.
=20
Fifth and Sixth patch is actually setting caching attributes =
(TLB.WIMGE) using corresponding Linux pte.
Thanks, applied 1/6 - 3/6 to kvm-ppc-queue.
Alex
=20
v3->v5
- Fix tlb-reference-flag clearing issue (patch 4/6)
- There was a patch (4/6 powerpc: move linux pte/hugepte search to =
more generic file)
in the last series of this patchset which was moving pte/hugepte =
search functions to
generic file. That patch is no more needed as some other patch is =
already applied to fix that :)
=20
v2->v3
- now lookup_linux_pte() only have pte search logic and it does not
set any access flags in pte. There is already a function for setting
access flag which will be called explicitly where needed.
On booke we only need to search for pte to get WIMG.
=20
v1->v2
- Earlier caching attributes (WIMGE) were set based of page is RAM or =
not
But now we get these attributes from corresponding Linux PTE.
=20
Bharat Bhushan (6):
powerpc: book3e: _PAGE_LENDIAN must be _PAGE_ENDIAN
kvm: powerpc: allow guest control "E" attribute in mas2
kvm: powerpc: allow guest control "G" attribute in mas2
kvm: powerpc: keep only pte search logic in lookup_linux_pte
kvm: booke: clear host tlb reference flag on guest tlb invalidation
kvm: powerpc: use caching attributes as per linux pte
=20
arch/powerpc/include/asm/kvm_host.h | 2 +-
arch/powerpc/include/asm/pgtable.h | 24 ++++++++++++++++
arch/powerpc/include/asm/pte-book3e.h | 2 +-
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 36 ++++++++----------------
arch/powerpc/kvm/booke.c | 2 +-
arch/powerpc/kvm/e500.h | 10 ++++--
arch/powerpc/kvm/e500_mmu_host.c | 50 =