# Re: \[PATCH\] powerpc/mpc85xx: Change spin table to cached memory

- From: Gala Kumar-B11780 \<hidden\>
- Date: 2012-11-25 13:01:27 
- List: linuxppc-dev
- Page: https://ratatoskr.run/linuxppc-dev/2012/11/9471796
- Thread: https://ratatoskr.run/linuxppc-dev/2012/09/9471435/t.md

```text

On Sep 29, 2012, at 6:44 PM, York Sun wrote:

> ePAPR v1.1 requires the spin table to be in cached memory. So we need
> to change the call argument of ioremap to enable cache and coherence.
> We also flush the cache after writing to spin table to keep it compatible
> with previous cache-inhibit spin table. Flushing before and after
> accessing spin table is recommended by ePAPR.
>=20
> Signed-off-by: York Sun <redacted>
> Acked-by: Timur Tabi <redacted>
> ---
> This patch applies to git://git.kernel.org/pub/scm/linux/kernel/git/galak=
/powerpc.git next branch.
>=20
> arch/powerpc/platforms/85xx/smp.c |   49 +++++++++++++++++++++++++++-----=
-----
> 1 file changed, 36 insertions(+), 13 deletions(-)

applied to next

- k=
```