In case of collision on i2c bus the controller which lost bus mastership
stays as a slave
for all subsequent transfers. This results in the i2c controller never
writing to the bus
for future transactions, resulting in i2c transfer timeouts.
This fix checks for a collision on last I2C transaction and sets the
I2COM_MASTER
bit for the new transaction.
Signed-off-by: Sachin Surendran <redacted>
---
drivers/i2c/busses/i2c-cpm.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
index c1e1096..bb94c6d 100644
--- a/drivers/i2c/busses/i2c-cpm.c
+++ b/drivers/i2c/busses/i2c-cpm.c
@@ -338,6 +338,14 @@ static int cpm_i2c_xfer(struct i2c_adapter *adap,
struct i2c_msg *msgs, int num)
tptr = 0;
rptr = 0;
+ /*
+ * If there was a collision in the last i2c transaction,
+ * Set I2COM_MASTER as it was cleared during collision.
+ */
+ if (in_be16(&tbdf->cbd_sc) & BD_SC_CL) {
+ out_8(&cpm->i2c_reg->i2com, I2COM_MASTER);
+ }
+
while (tptr < num) {
pmsg = &msgs[tptr];
dev_dbg(&adap->dev, "R: %d T: %d\n", rptr, tptr);
On Oct 30, 2012, at 10:00 PM, sachin surendran wrote:
In case of collision on i2c bus the controller which lost bus =
mastership stays as a slave
for all subsequent transfers. This results in the i2c controller never =
writing to the bus=20
for future transactions, resulting in i2c transfer timeouts.
This fix checks for a collision on last I2C transaction and sets the =
I2COM_MASTER=20
bit for the new transaction.
=20
Signed-off-by: Sachin Surendran <redacted>
---
drivers/i2c/busses/i2c-cpm.c | 8 ++++++++
1 file changed, 8 insertions(+)
patch doesn't apply, please resend properly.
- k
quoted hunk
=20
diff --git a/drivers/i2c/busses/i2c-cpm.c =
b/drivers/i2c/busses/i2c-cpm.c
quoted hunk
index c1e1096..bb94c6d 100644
--- a/drivers/i2c/busses/i2c-cpm.c
+++ b/drivers/i2c/busses/i2c-cpm.c
@@ -338,6 +338,14 @@ static int cpm_i2c_xfer(struct i2c_adapter *adap, =
struct i2c_msg *msgs, int num)
tptr =3D 0;
rptr =3D 0;
=20
+ /*
+ * If there was a collision in the last i2c transaction,
+ * Set I2COM_MASTER as it was cleared during collision.
+ */
+ if (in_be16(&tbdf->cbd_sc) & BD_SC_CL) {
+ out_8(&cpm->i2c_reg->i2com, I2COM_MASTER);
+ }
+
while (tptr < num) {
pmsg =3D &msgs[tptr];
dev_dbg(&adap->dev, "R: %d T: %d\n", rptr, tptr);
=20
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Hi Kumar,
I have resent the updated patch.
Regards
Sachin
On Mon, Nov 26, 2012 at 2:21 AM, Kumar Gala [off-list ref] wrote:
On Oct 30, 2012, at 10:00 PM, sachin surendran wrote:
quoted
In case of collision on i2c bus the controller which lost bus mastership stays as a slave
for all subsequent transfers. This results in the i2c controller never writing to the bus
for future transactions, resulting in i2c transfer timeouts.
This fix checks for a collision on last I2C transaction and sets the I2COM_MASTER
bit for the new transaction.
Signed-off-by: Sachin Surendran <redacted>
---
drivers/i2c/busses/i2c-cpm.c | 8 ++++++++
1 file changed, 8 insertions(+)
patch doesn't apply, please resend properly.
- k
quoted
diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
index c1e1096..bb94c6d 100644
--- a/drivers/i2c/busses/i2c-cpm.c
+++ b/drivers/i2c/busses/i2c-cpm.c
@@ -338,6 +338,14 @@ static int cpm_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
tptr = 0;
rptr = 0;
+ /*
+ * If there was a collision in the last i2c transaction,
+ * Set I2COM_MASTER as it was cleared during collision.
+ */
+ if (in_be16(&tbdf->cbd_sc) & BD_SC_CL) {
+ out_8(&cpm->i2c_reg->i2com, I2COM_MASTER);
+ }
+
while (tptr < num) {
pmsg = &msgs[tptr];
dev_dbg(&adap->dev, "R: %d T: %d\n", rptr, tptr);
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