[PATCH 1/2 v3] powerpc/85xx: Add Quicc Engine support for p1025rdb

Subsystems: linux for powerpc (32-bit and 64-bit), linux for powerpc embedded ppc85xx, the rest

STALE5291d

4 messages, 2 authors, 2012-02-13 · open the first message on its own page

[PATCH 1/2 v3] powerpc/85xx: Add Quicc Engine support for p1025rdb

From: Zhicheng Fan <hidden>
Date: 2012-02-13 05:36:53

From: Zhicheng Fan <redacted>

Signed-off-by: Zhicheng Fan <redacted>
---
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |   78 ++++++++++++++++++++++++++++-
 1 files changed, 77 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index e95aef7..c9dfdcc 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c

@@ -26,6 +26,9 @@
 #include <asm/prom.h>
 #include <asm/udbg.h>
 #include <asm/mpic.h>
+#include <asm/qe.h>
+#include <asm/qe_ic.h>
+#include <asm/fsl_guts.h>
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>

@@ -47,6 +50,10 @@ void __init mpc85xx_rdb_pic_init(void)
 	struct mpic *mpic;
 	unsigned long root = of_get_flat_dt_root();
 
+#ifdef CONFIG_QUICC_ENGINE
+	struct device_node *np;
+#endif
+
 	if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
 		mpic = mpic_alloc(NULL, 0,
 			MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |

@@ -62,6 +69,18 @@ void __init mpc85xx_rdb_pic_init(void)
 
 	BUG_ON(mpic == NULL);
 	mpic_init(mpic);
+
+#ifdef CONFIG_QUICC_ENGINE
+	np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+	if (np) {
+		qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
+				qe_ic_cascade_high_mpic);
+		of_node_put(np);
+
+	} else
+		pr_err("%s: Could not find qe-ic node\n", __func__);
+#endif
+
 }
 
 /*

@@ -69,7 +88,7 @@ void __init mpc85xx_rdb_pic_init(void)
  */
 static void __init mpc85xx_rdb_setup_arch(void)
 {
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
 	struct device_node *np;
 #endif

@@ -85,6 +104,63 @@ static void __init mpc85xx_rdb_setup_arch(void)
 #endif
 
 	mpc85xx_smp_init();
+
+#ifdef CONFIG_QUICC_ENGINE
+	np = of_find_compatible_node(NULL, NULL, "fsl,qe");
+	if (!np) {
+		pr_err("%s: Could not find Quicc Engine node\n", __func__);
+		goto qe_fail;
+	}
+
+	qe_reset();
+	of_node_put(np);
+
+	np = of_find_node_by_name(NULL, "par_io");
+	if (np) {
+		struct device_node *ucc;
+
+		par_io_init(np);
+		of_node_put(np);
+
+		for_each_node_by_name(ucc, "ucc")
+			par_io_of_config(ucc);
+
+	}
+	if (machine_is(p1025_rdb)) {
+
+		struct ccsr_guts_85xx __iomem *guts;
+
+		np = of_find_node_by_name(NULL, "global-utilities");
+		if (np) {
+
+			guts = of_iomap(np, 0);
+			if (!guts) {
+
+				pr_err("mpc85xx-rdb: could not map global utilties register!\n");
+
+			} else {
+#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
+			/* P1025 has pins muxed for QE and other functions. To
+			* enable QE UEC mode, we need to set bit QE0 for UCC1
+			* in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
+			* and QE12 for QE MII management singals in PMUXCR
+			* register.
+			*/
+				setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE0 |
+						MPC85xx_PMUXCR_QE3 |
+						MPC85xx_PMUXCR_QE9 |
+						MPC85xx_PMUXCR_QE12);
+#endif
+			}
+			iounmap(guts);
+			of_node_put(np);
+		}
+
+	}
+
+qe_fail:
+#endif	/* CONFIG_QUICC_ENGINE */
+
 	printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
 }

-- 
1.7.0.4

[PATCH 2/2 v3] powerpc/85xx: Abstract common define of signal multiplex control for qe

From: Zhicheng Fan <hidden>
Date: 2012-02-13 05:36:53

From: Zhicheng Fan <redacted>

The mpc85xx_rdb and mpc85xx_mds have commom define of signal multiplex for qe ,so
they need to go in common header, the patch abstract them to fsl_guts.h

Signed-off-by: Zhicheng Fan <redacted>
---
 arch/powerpc/include/asm/fsl_guts.h       |   18 ++++++++++++++++++
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |   21 ++++++++-------------
 2 files changed, 26 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index bebd124..8c78ee2 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h

@@ -114,6 +114,24 @@ struct ccsr_guts_86xx {
 	__be32	srds2cr1;	/* 0x.0f44 - SerDes2 Control Register 0 */
 } __attribute__ ((packed));
 
+#ifdef CONFIG_PPC_85xx
+
+/* Alternate function signal multiplex control */
+#define MPC85xx_PMUXCR_QE0              0x00008000
+#define MPC85xx_PMUXCR_QE2              0x00002000
+#define MPC85xx_PMUXCR_QE3              0x00001000
+#define MPC85xx_PMUXCR_QE4              0x00000800
+#define MPC85xx_PMUXCR_QE5              0x00000400
+#define MPC85xx_PMUXCR_QE6              0x00000200
+#define MPC85xx_PMUXCR_QE7              0x00000100
+#define MPC85xx_PMUXCR_QE8              0x00000080
+#define MPC85xx_PMUXCR_QE9              0x00000040
+#define MPC85xx_PMUXCR_QE10             0x00000020
+#define MPC85xx_PMUXCR_QE11             0x00000010
+#define MPC85xx_PMUXCR_QE12             0x00000008
+
+#endif
+
 #ifdef CONFIG_PPC_86xx
 
 #define CCSR_GUTS_DMACR_DEV_SSI	0	/* DMA controller/channel set to SSI */

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 1d15a0c..dc5421c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c

@@ -51,6 +51,7 @@
 #include <asm/qe_ic.h>
 #include <asm/mpic.h>
 #include <asm/swiotlb.h>
+#include <asm/fsl_guts.h>
 #include "smp.h"
 
 #include "mpc85xx.h"

@@ -268,22 +269,16 @@ static void __init mpc85xx_mds_qe_init(void)
 	mpc85xx_mds_reset_ucc_phys();
 
 	if (machine_is(p1021_mds)) {
-#define MPC85xx_PMUXCR_OFFSET           0x60
-#define MPC85xx_PMUXCR_QE0              0x00008000
-#define MPC85xx_PMUXCR_QE3              0x00001000
-#define MPC85xx_PMUXCR_QE9              0x00000040
-#define MPC85xx_PMUXCR_QE12             0x00000008
-		static __be32 __iomem *pmuxcr;
+
+		struct ccsr_guts_85xx __iomem *guts;
 
 		np = of_find_node_by_name(NULL, "global-utilities");
 
 		if (np) {
-			pmuxcr = of_iomap(np, 0) + MPC85xx_PMUXCR_OFFSET;
+			guts = of_iomap(np, 0);
 
-			if (!pmuxcr)
-				printk(KERN_EMERG "Error: Alternate function"
-					" signal multiplex control register not"
-					" mapped!\n");
+			if (!guts)
+				pr_err("mpc85xx-rdb: could not map global utilties register!\n");
 			else
 			/* P1021 has pins muxed for QE and other functions. To
 			 * enable QE UEC mode, we need to set bit QE0 for UCC1

@@ -291,11 +286,11 @@ static void __init mpc85xx_mds_qe_init(void)
 			 * and QE12 for QE MII management signals in PMUXCR
 			 * register.
 			 */
-				setbits32(pmuxcr, MPC85xx_PMUXCR_QE0 |
+				setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE0 |
 						  MPC85xx_PMUXCR_QE3 |
 						  MPC85xx_PMUXCR_QE9 |
 						  MPC85xx_PMUXCR_QE12);
-
+			iounmap(guts);
 			of_node_put(np);
 		}

-- 
1.7.0.4

Re: [PATCH 1/2 v3] powerpc/85xx: Add Quicc Engine support for p1025rdb

From: Tabi Timur-B04825 <hidden>
Date: 2012-02-13 16:22:34

On Sun, Feb 12, 2012 at 11:33 PM, Zhicheng Fan [off-list ref] wrote=
:

From: Zhicheng Fan <redacted>

Signed-off-by: Zhicheng Fan <redacted>
---
=A0arch/powerpc/platforms/85xx/mpc85xx_rdb.c | =A0 78 +++++++++++++++++++=

+++++++++-

quoted hunk

=A01 files changed, 77 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/pla=

tforms/85xx/mpc85xx_rdb.c

quoted hunk

index e95aef7..c9dfdcc 100644

--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c

@@ -26,6 +26,9 @@

=A0#include <asm/prom.h>
=A0#include <asm/udbg.h>
=A0#include <asm/mpic.h>
+#include <asm/qe.h>
+#include <asm/qe_ic.h>
+#include <asm/fsl_guts.h>

=A0#include <sysdev/fsl_soc.h>
=A0#include <sysdev/fsl_pci.h>

@@ -47,6 +50,10 @@ void __init mpc85xx_rdb_pic_init(void)

=A0 =A0 =A0 =A0struct mpic *mpic;
=A0 =A0 =A0 =A0unsigned long root =3D of_get_flat_dt_root();

+#ifdef CONFIG_QUICC_ENGINE
+ =A0 =A0 =A0 struct device_node *np;
+#endif
+
=A0 =A0 =A0 =A0if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP"))=

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0mpic =3D mpic_alloc(NULL, 0,
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0MPIC_BIG_ENDIAN | MPIC_BRO=

KEN_FRR_NIRQS |

quoted hunk

@@ -62,6 +69,18 @@ void __init mpc85xx_rdb_pic_init(void)

=A0 =A0 =A0 =A0BUG_ON(mpic =3D=3D NULL);
=A0 =A0 =A0 =A0mpic_init(mpic);
+
+#ifdef CONFIG_QUICC_ENGINE
+ =A0 =A0 =A0 np =3D of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+ =A0 =A0 =A0 if (np) {
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 qe_ic_casca=

de_high_mpic);

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 of_node_put(np);
+
+ =A0 =A0 =A0 } else
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 pr_err("%s: Could not find qe-ic node\n", _=

_func__);

quoted hunk

+#endif
+
=A0}

=A0/*

@@ -69,7 +88,7 @@ void __init mpc85xx_rdb_pic_init(void)

=A0*/
=A0static void __init mpc85xx_rdb_setup_arch(void)
=A0{
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
=A0 =A0 =A0 =A0struct device_node *np;
=A0#endif

@@ -85,6 +104,63 @@ static void __init mpc85xx_rdb_setup_arch(void)

=A0#endif

=A0 =A0 =A0 =A0mpc85xx_smp_init();
+
+#ifdef CONFIG_QUICC_ENGINE
+ =A0 =A0 =A0 np =3D of_find_compatible_node(NULL, NULL, "fsl,qe");
+ =A0 =A0 =A0 if (!np) {
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 pr_err("%s: Could not find Quicc Engine nod=

e\n", __func__);

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 goto qe_fail;
+ =A0 =A0 =A0 }
+
+ =A0 =A0 =A0 qe_reset();
+ =A0 =A0 =A0 of_node_put(np);
+
+ =A0 =A0 =A0 np =3D of_find_node_by_name(NULL, "par_io");
+ =A0 =A0 =A0 if (np) {
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 struct device_node *ucc;
+
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 par_io_init(np);
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 of_node_put(np);
+
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 for_each_node_by_name(ucc, "ucc")
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 par_io_of_config(ucc);
+
+ =A0 =A0 =A0 }
+ =A0 =A0 =A0 if (machine_is(p1025_rdb)) {
+
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 struct ccsr_guts_85xx __iomem *guts;
+
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 np =3D of_find_node_by_name(NULL, "global-u=

tilities");

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (np) {
+
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 guts =3D of_iomap(np, 0);
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!guts) {
+
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 pr_err("mpc=

85xx-rdb: could not map global utilties register!\n");

+
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } else {
+#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)

This #if should be above the " if (machine_is(p1025_rdb)) {" line.

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* P1025 has pins muxed for=

 QE and other functions. To

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * enable QE UEC mode, we ne=

ed to set bit QE0 for UCC1

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * in Eth mode, QE0 and QE3 =

for UCC5 in Eth mode, QE9

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * and QE12 for QE MII manag=

ement singals in PMUXCR

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * register.
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 */
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 setbits32(&=

guts->pmuxcr, MPC85xx_PMUXCR_QE0 |

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=

 =A0 =A0 =A0 =A0 =A0 MPC85xx_PMUXCR_QE3 |

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=

 =A0 =A0 =A0 =A0 =A0 MPC85xx_PMUXCR_QE9 |

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=

 =A0 =A0 =A0 =A0 =A0 MPC85xx_PMUXCR_QE12);

+#endif
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 }
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 iounmap(guts);

Put the iounmap() call inside the "else" bracket:


                               setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE0 =
|
                                               MPC85xx_PMUXCR_QE3 |
                                               MPC85xx_PMUXCR_QE9 |
                                               MPC85xx_PMUXCR_QE12);
                               iounmap(guts);
                       }

You're not really paying attention to the code that you're writing.
Please take a good look at your code before you paste it.

--=20
Timur Tabi
Linux kernel developer at Freescale=

Re: [PATCH 2/2 v3] powerpc/85xx: Abstract common define of signal multiplex control for qe

From: Tabi Timur-B04825 <hidden>
Date: 2012-02-13 16:24:57

On Sun, Feb 12, 2012 at 11:33 PM, Zhicheng Fan [off-list ref] wrote=
:=0A=
=0A=

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (np) {=0A=
- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 pmuxcr =3D of_iomap(np, 0) =

+ MPC85xx_PMUXCR_OFFSET;=0A=

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 guts =3D of_iomap(np, 0);=

=0A=

=0A=
- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!pmuxcr)=0A=
- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 printk(KERN=

_EMERG "Error: Alternate function"=0A=

- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=

 =A0 " signal multiplex control register not"=0A=

- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=

 =A0 " mapped!\n");=0A=

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!guts)=0A=
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 pr_err("mpc=

85xx-rdb: could not map global utilties register!\n");=0A=

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0else=0A=
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* P1021 has pins muxed fo=

r QE and other functions. To=0A=

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * enable QE UEC mode, we =

need to set bit QE0 for UCC1=0A=

quoted hunk

@@ -291,11 +286,11 @@ static void __init mpc85xx_mds_qe_init(void)=0A=

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * and QE12 for QE MII man=

agement signals in PMUXCR=0A=

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * register.=0A=
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 */=0A=
- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 setbits32(p=

muxcr, MPC85xx_PMUXCR_QE0 |=0A=

+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 setbits32(&=

guts->pmuxcr, MPC85xx_PMUXCR_QE0 |=0A=

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 =A0 =A0MPC85xx_PMUXCR_QE3 |=0A=

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 =A0 =A0MPC85xx_PMUXCR_QE9 |=0A=

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 =A0 =A0MPC85xx_PMUXCR_QE12);=0A=

-=0A=
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 iounmap(guts);=0A=

=0A=
This needs to move into the "else" statement:=0A=
=0A=
else {=0A=
   setbits(...=0A=
   iounmap( ...)=0A=
}=0A=
=0A=
=0A=
-- =0A=
Timur Tabi=0A=
Linux kernel developer at Freescale=0A=

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