Joakim Tjernlund/Transmode wrote on 2011/10/11 09:42:58:
Dan Malek [off-list ref] wrote on 2011/10/10 20:03:53:
quoted
On Oct 10, 2011, at 9:45 AM, Joakim Tjernlund wrote:
quoted
That is an easy port but I will have to do that blind. Would you
mind take this for a spin on 2.4 first?
My current system is running 2.6, so I don't have much
interested in testing 2.4
Too bad as I won't be able to run 2.6 at all.
However, I just sent you a dry port to 3.0 of the large page stuff to
you. Happy testing.
Dan, where did you go? I figured you would throw yourself at this as this is
something you been meaning to do yourself for years :)
Jocke
Hi Joakim.
On Oct 12, 2011, at 2:36 PM, Joakim Tjernlund wrote:
Dan, where did you go? I figured you would throw yourself at this as
this is
something you been meaning to do yourself for years :)
Too many things to do :-) I did have the wired page version that I've
been using now and then.
I had the bad thought yesterday that we need to check the
implementation for coherent memory. It appears we set the
pages non-cached, which could cause some trouble. We
have to ensure we never access the same physical page
with different attributes from the 8M mapping and the single
page "coherent" mapping.
I'll try to get some testing done.
Thanks.
-- Dan
Dan Malek [off-list ref] wrote on 2011/10/13 03:08:12:
Hi Joakim.
On Oct 12, 2011, at 2:36 PM, Joakim Tjernlund wrote:
quoted
Dan, where did you go? I figured you would throw yourself at this as
this is
something you been meaning to do yourself for years :)
Too many things to do :-) I did have the wired page version that I've
been using now and then.
ehhm, do the fun stuff first? :)
I had the bad thought yesterday that we need to check the
implementation for coherent memory. It appears we set the
pages non-cached, which could cause some trouble. We
have to ensure we never access the same physical page
with different attributes from the 8M mapping and the single
page "coherent" mapping.
I'll try to get some testing done.
In 2.4 this seems fine:
#ifdef CONFIG_PIN_TLB
#define VMALLOC_OFFSET (0x2000000) /* 32M */
#else
#define VMALLOC_OFFSET (0x1000000) /* 16M */
#endif
...
/* adjust vmalloc_start */
vmalloc_start = (vmalloc_start + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1);
Earlier you have
MMU_init(void)
{
....
vmalloc_start = KERNELBASE + total_lowmem;
You could add 8MB to that just to be sure. In my system there is no consistent_alloc so
early though.
Jocke
BTW, I noted that you can remove the
ori r11, r11, 1 /* Set valid bit in physical L2 page */
insns in the TLB routines in 3.0, the valid bit is now set be the mm system.
Jocke
On Oct 13, 2011, at 7:00 AM, Joakim Tjernlund wrote:
ehhm, do the fun stuff first? :)
Need to pay the bills, first :-)
Thanks for the other information.
-- Dan