From: Michael Neuling <hidden> Date: 2011-09-09 01:38:12
perf events, powerpc: Add POWER7 stalled-cycles-frontend/backend events
Extent the POWER7 PMU driver with definitions
for generic front-end and back-end stall events.
Anshuman,
Can you explain what these P7 events actually are and how they relate to
Ingo's original comment on this in
8f62242246351b5a4bc0c1f00c0c7003edea128a
Both events limit performance: most front end stalls tend to be
caused by branch misprediction or instruction fetch cachemisses,
backend stalls can be caused by various resource shortages or
inefficient instruction scheduling.
On Friday 09 September 2011 07:08 AM, Michael Neuling wrote:
quoted
perf events, powerpc: Add POWER7 stalled-cycles-frontend/backend events
Extent the POWER7 PMU driver with definitions
for generic front-end and back-end stall events.
Anshuman,
Can you explain what these P7 events actually are and how they relate to
Ingo's original comment on this in
8f62242246351b5a4bc0c1f00c0c7003edea128a
Both events limit performance: most front end stalls tend to be
caused by branch misprediction or instruction fetch cachemisses,
backend stalls can be caused by various resource shortages or
inefficient instruction scheduling.
As explained in Ingo's original comment, the exact definitions of the stall
events are very much processor specific as different things mean different in
their respective instruction pipeline. These two Power7 raw events are the closest
approximation to the concept detailed in Ingo's comment.
From: Michael Neuling <hidden> Date: 2011-09-09 06:26:29
In message [off-list ref] you wrote:
On Friday 09 September 2011 07:08 AM, Michael Neuling wrote:
quoted
quoted
perf events, powerpc: Add POWER7 stalled-cycles-frontend/backend events
Extent the POWER7 PMU driver with definitions
for generic front-end and back-end stall events.
Anshuman,
Can you explain what these P7 events actually are and how they relate to
Ingo's original comment on this in
8f62242246351b5a4bc0c1f00c0c7003edea128a
Both events limit performance: most front end stalls tend to be
caused by branch misprediction or instruction fetch cachemisses,
backend stalls can be caused by various resource shortages or
inefficient instruction scheduling.
As explained in Ingo's original comment, the exact definitions of the
stall events are very much processor specific as different things mean
different in their respective instruction pipeline. These two Power7
raw events are the closest approximation to the concept detailed in
Ingo's comment.
Yes, it means no groups completed and GCT not empty
I agree, I think they match what Ingo is trying to achieve.
Can you add these descriptions to the patch and resubmit please?
If you can find similar events for power4/5/5+/6 that would be great too
submit too.
FWIW, the patch compiles and runs for me.
Mikey
From: Benjamin Herrenschmidt <benh@kernel.crashing.org> Date: 2011-11-27 22:41:04
On Fri, 2011-09-09 at 16:26 +1000, Michael Neuling wrote:
I agree, I think they match what Ingo is trying to achieve.
Can you add these descriptions to the patch and resubmit please?
If you can find similar events for power4/5/5+/6 that would be great too
submit too.
FWIW, the patch compiles and runs for me.
I already put it in my next branch, but feel free to send a followup
patch adding some comments if you think that's worthwhile.
Cheers,
Ben.