FSL eSDHC bindings update

On Thu, Jan 22, 2009 at 01:15:01PM -0600, Kumar Gala wrote:

On Jan 21, 2009, at 8:00 PM, Anton Vorontsov wrote:

quoted

This patch adds a new driver: sdhci-of. The driver is similar to
the sdhci-pci, it contains common probe code, and controller-specific
ops and quirks.

So far there are only Freescale eSDHC ops and quirks.

Signed-off-by: Anton Vorontsov <redacted>
---
drivers/mmc/host/Kconfig    |   10 ++
drivers/mmc/host/Makefile   |    1 +
drivers/mmc/host/sdhci-of.c |  274 ++++++++++++++++++++++++++++++++++ 
+++++++++
3 files changed, 285 insertions(+), 0 deletions(-)
create mode 100644 drivers/mmc/host/sdhci-of.c

Still griping about lack of OF binding docs for this.

Here they're.

I'm assuming that MPC8536 is the first chip in 85xx family with eSDHC.


Thanks,

-- 
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2

This patch documents OF bindings for the Freescale Enhanced Secure
Digital Host Controller.

Signed-off-by: Anton Vorontsov <redacted>
---
 Documentation/powerpc/dts-bindings/fsl/esdhc.txt |   24 ++++++++++++++++++++++
 1 files changed, 24 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/powerpc/dts-bindings/fsl/esdhc.txt

diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
new file mode 100644
index 0000000..6008465
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt

@@ -0,0 +1,24 @@
+* Freescale Enhanced Secure Digital Host Controller (eSDHC)
+
+The Enhanced Secure Digital Host Controller provides an interface
+for MMC, SD, and SDIO types of memory cards.
+
+Required properties:
+  - compatible : should be
+    "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.
+    "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.
+  - reg : should contain eSDHC registers location and length.
+  - interrupts : should contain eSDHC interrupt.
+  - interrupt-parent : interrupt source phandle.
+  - clock-frequency : specifies eSDHC base clock frequency.
+
+Example:
+
+sdhci@2e000 {
+	compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+	reg = <0x2e000 0x1000>;
+	interrupts = <42 0x8>;
+	interrupt-parent = <&ipic>;
+	/* Filled in by U-Boot */
+	clock-frequency = <0>;
+};

-- 
1.5.6.5

- sdhc node renamed to sdhci ("sdhc" name is confusing since SDHC is
  used to name Secure Digital High Capacity cards, while SDHCI is an
  interface).

- Get rid of "fsl,esdhc" compatible entry, it's replaced by the
  "fsl,<chip>-esdhc" scheme;

- Get rid of `model' property.

Signed-off-by: Anton Vorontsov <redacted>
---
 arch/powerpc/boot/dts/mpc8377_mds.dts |    7 ++++---
 arch/powerpc/boot/dts/mpc8378_mds.dts |    7 ++++---
 arch/powerpc/boot/dts/mpc8379_mds.dts |    7 ++++---
 3 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index a519e85..3e3ec8f 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts

@@ -313,12 +313,13 @@
 			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
-		sdhc@2e000 {
-			model = "eSDHC";
-			compatible = "fsl,esdhc";
+		sdhci@2e000 {
+			compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
 			reg = <0x2e000 0x1000>;
 			interrupts = <42 0x8>;
 			interrupt-parent = <&ipic>;
+			/* Filled in by U-Boot */
+			clock-frequency = <0>;
 		};
 
 		sata@18000 {

diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 6bbee49..c3b212c 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts

@@ -313,12 +313,13 @@
 			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
-		sdhc@2e000 {
-			model = "eSDHC";
-			compatible = "fsl,esdhc";
+		sdhci@2e000 {
+			compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
 			reg = <0x2e000 0x1000>;
 			interrupts = <42 0x8>;
 			interrupt-parent = <&ipic>;
+			/* Filled in by U-Boot */
+			clock-frequency = <0>;
 		};
 
 		/* IPIC

diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index acf06c4..1b61cda 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts

@@ -310,12 +310,13 @@
 			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
-		sdhc@2e000 {
-			model = "eSDHC";
-			compatible = "fsl,esdhc";
+		sdhci@2e000 {
+			compatible = "fsl,mpc8379-esdhc";
 			reg = <0x2e000 0x1000>;
 			interrupts = <42 0x8>;
 			interrupt-parent = <&ipic>;
+			/* Filled in by U-Boot */
+			clock-frequency = <0>;
 		};
 
 		sata@18000 {

-- 
1.5.6.5

Simply add appropriate sdhci nodes.

Note that U-Boot should configure pin multiplexing for eSDHC prior
to Linux could use it. U-Boot should also fill-in the clock-frequency
property (eSDHC clock depends on board-specific SCCR[ESDHCCM] bits).

Signed-off-by: Anton Vorontsov <redacted>
---
 arch/powerpc/boot/dts/mpc8377_rdb.dts |    9 +++++++++
 arch/powerpc/boot/dts/mpc8378_rdb.dts |    9 +++++++++
 arch/powerpc/boot/dts/mpc8379_rdb.dts |    9 +++++++++
 3 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index b4ab3d0..6f4d614 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts

@@ -291,6 +291,15 @@
 			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
+		sdhci@2e000 {
+			compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+			reg = <0x2e000 0x1000>;
+			interrupts = <42 0x8>;
+			interrupt-parent = <&ipic>;
+			/* Filled in by U-Boot */
+			clock-frequency = <0>;
+		};
+
 		sata@18000 {
 			compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
 			reg = <0x18000 0x1000>;

diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 1b05fb0..6457ef1 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts

@@ -289,6 +289,15 @@
 			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
+		sdhci@2e000 {
+			compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+			reg = <0x2e000 0x1000>;
+			interrupts = <42 0x8>;
+			interrupt-parent = <&ipic>;
+			/* Filled in by U-Boot */
+			clock-frequency = <0>;
+		};
+
 		/* IPIC
 		 * interrupts cell = <intr #, sense>
 		 * sense values match linux IORESOURCE_IRQ_* defines:

diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 72cdc3c..203fff2 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts

@@ -288,6 +288,15 @@
 			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
+		sdhci@2e000 {
+			compatible = "fsl,mpc8379-esdhc";
+			reg = <0x2e000 0x1000>;
+			interrupts = <42 0x8>;
+			interrupt-parent = <&ipic>;
+			/* Filled in by U-Boot */
+			clock-frequency = <0>;
+		};
+
 		sata@18000 {
 			compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 			reg = <0x18000 0x1000>;

-- 
1.5.6.5

On Feb 5, 2009, at 1:04 PM, Anton Vorontsov wrote:

On Thu, Jan 22, 2009 at 01:15:01PM -0600, Kumar Gala wrote:

quoted

On Jan 21, 2009, at 8:00 PM, Anton Vorontsov wrote:

quoted

This patch adds a new driver: sdhci-of. The driver is similar to
the sdhci-pci, it contains common probe code, and controller- 
specific
ops and quirks.

So far there are only Freescale eSDHC ops and quirks.

Signed-off-by: Anton Vorontsov <redacted>
---
drivers/mmc/host/Kconfig    |   10 ++
drivers/mmc/host/Makefile   |    1 +
drivers/mmc/host/sdhci-of.c |  274 ++++++++++++++++++++++++++++++++ 
++
+++++++++
3 files changed, 285 insertions(+), 0 deletions(-)
create mode 100644 drivers/mmc/host/sdhci-of.c

Still griping about lack of OF binding docs for this.

Here they're.

I'm assuming that MPC8536 is the first chip in 85xx family with eSDHC.

thanks.  MPC8536 is the first.  Do we need a u-boot patch for clock- 
frequency on 85xx?

- k

On Thu, Feb 05, 2009 at 08:52:56PM -0600, Kumar Gala wrote:

On Feb 5, 2009, at 1:04 PM, Anton Vorontsov wrote:

quoted

On Thu, Jan 22, 2009 at 01:15:01PM -0600, Kumar Gala wrote:

quoted

On Jan 21, 2009, at 8:00 PM, Anton Vorontsov wrote:

quoted

This patch adds a new driver: sdhci-of. The driver is similar to
the sdhci-pci, it contains common probe code, and controller- 
specific
ops and quirks.

So far there are only Freescale eSDHC ops and quirks.

Signed-off-by: Anton Vorontsov <redacted>
---
drivers/mmc/host/Kconfig    |   10 ++
drivers/mmc/host/Makefile   |    1 +
drivers/mmc/host/sdhci-of.c |  274 ++++++++++++++++++++++++++++++++ 
++
+++++++++
3 files changed, 285 insertions(+), 0 deletions(-)
create mode 100644 drivers/mmc/host/sdhci-of.c

Still griping about lack of OF binding docs for this.

Here they're.

I'm assuming that MPC8536 is the first chip in 85xx family with eSDHC.

thanks.  MPC8536 is the first.  Do we need a u-boot patch for clock- 
frequency on 85xx?

Yes, I'll prepare U-Boot patches soon (on top of Andy Fleming's
eSDHC work):
http://www.mail-archive.com/u-boot@lists.denx.de/msg04183.html

W/o the U-Boot patches SDHCI driver will just fail to probe
(gracefully, saying that the controller doesn't specify sdclk).

-- 
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2

On Feb 5, 2009, at 1:04 PM, Anton Vorontsov wrote:

This patch documents OF bindings for the Freescale Enhanced Secure
Digital Host Controller.

Signed-off-by: Anton Vorontsov <redacted>
---
Documentation/powerpc/dts-bindings/fsl/esdhc.txt |   24 +++++++++++++ 
+++++++++
1 files changed, 24 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/fsl/esdhc.txt

applied to next

- k

On Feb 5, 2009, at 1:04 PM, Anton Vorontsov wrote:

- sdhc node renamed to sdhci ("sdhc" name is confusing since SDHC is
 used to name Secure Digital High Capacity cards, while SDHCI is an
 interface).

- Get rid of "fsl,esdhc" compatible entry, it's replaced by the
 "fsl,<chip>-esdhc" scheme;

- Get rid of `model' property.

Signed-off-by: Anton Vorontsov <redacted>
---
arch/powerpc/boot/dts/mpc8377_mds.dts |    7 ++++---
arch/powerpc/boot/dts/mpc8378_mds.dts |    7 ++++---
arch/powerpc/boot/dts/mpc8379_mds.dts |    7 ++++---
3 files changed, 12 insertions(+), 9 deletions(-)

applied to next

- k

On Feb 5, 2009, at 1:04 PM, Anton Vorontsov wrote:

Simply add appropriate sdhci nodes.

Note that U-Boot should configure pin multiplexing for eSDHC prior
to Linux could use it. U-Boot should also fill-in the clock-frequency
property (eSDHC clock depends on board-specific SCCR[ESDHCCM] bits).

Signed-off-by: Anton Vorontsov <redacted>
---
arch/powerpc/boot/dts/mpc8377_rdb.dts |    9 +++++++++
arch/powerpc/boot/dts/mpc8378_rdb.dts |    9 +++++++++
arch/powerpc/boot/dts/mpc8379_rdb.dts |    9 +++++++++
3 files changed, 27 insertions(+), 0 deletions(-)

applied to next

- k