PCI Bus Mapping for MPC8548 with multiple PCI interfaces

Hello,
=20
I'm currently developing a bootloader for a MPC8548 based board. This =
board has got three PCI interfaces (PCI1, PCI2 and PCIe). At the PCIe =
interface the MPC8548 appears as PCI-Bridge (at bus 0 device 0), at the =
PCI1/2 interfaces the MPC8548 appears as normal devices (bus 0 device =
0).

And now I'm a little bit unshure about how Linux expects the PCI bus =
mapping. I see two ways:


A)
--------
MPC8548:   PCI1         PCI2         PCIe
             |           |             |
             |           |             3
             |           |           bridge
             0           2             4
--------     |           |             |
extern:   -------      ------        ------
          |  |  |      |    |        |    |
         dev | dev     dev dev...   dev  dev ...
             0
           bridge
             1
             |
          ---------
          |   |   |
         dev dev dev...

Since I have to create Type 0 Config Read/Writes to access the first bus =
of an interface, my PciConfigRead/Write functions would have to convert =
the bus no. from 0->0 2->0 3->0 (for the example). And PCIe bridge's =
primary bus no. has to be set to 0.



or B)
--------

47 more lines

On Monday 29 September 2008, Ralf Tr=FCbenbach wrote:

Every bus is mapped independently. And PciConfigRead/Write functions
convert the bus no. so that upper layers (and user) see a bus mapping
similar to A). =20
=20
Maybe someone knows how U-Boot or Linux would map the interfaces?
=20

You should use your option B) in the firmware, i.e. set up every PCI
independently from the others, startig at bus 0.

You should not fake the bus mapping but rather show the pci domains
separately to user space.

	Arnd <><