Porting linux on PPC405

3 messages, 2 authors, 2008-09-05 · open the first message on its own page

Porting linux on PPC405

From: <hidden>
Date: 2008-09-04 06:39:37

Hi all,

I am trying to port Linux 2.6 on PPC405 processor.I have 
EDK 10.1,
Xilinx University program board (with Virtex II Pro device)
linux kernel from Xilinx git. (git.xilinx.com)
Cross Compiler (Croostool)
fdt.dts file generated by EDK using with help of Xilinx fdt patch.

I could compile the kernel and could generate the zImage. 
I've downloaded the hardware bit file and then the zImage to the DDR SDRAM on the board using Parallel 4 cable.

when i give the RUN command, this is what i get..


booting virtex
memstart=0x0
memsize=0x10000000
zImage starting: loaded at 0x00400000 (sp: 0x00578f1c)
Allocating 0x326564 bytes for kernel ...
gunzipping (0x00000000 <- 0x0040c000:0x005772bb)...done 0x3015c8 bytes
Linux/PowerPC load: console=ttyS0 ip=on root=/dev/ram
Finalizing device tree... flat tree at 0x40ad68
 
The booting process seems to be stopped after this. I the bootarguments i've given are,

In dts file,

bootargs = "console=ttyS0 ip=off root=/dev/ram";
linux,stdout-path="/plb@0/serial@83e00000";

Please let me know if've missed smthing here..!
n any clue on the reason why the boor process seems to be hanged here !

Thanks in advance,
Vineeth
 

RE: Porting linux on PPC405

From: John Linn <hidden>
Date: 2008-09-04 15:26:49

Hi Vineeth,

I don't directly support that board, but it's similar to the ML405 in
that it uses a 405 processor.  Since I don't test on that board or any
V2Pro board, I'm going to tell you my experience on the ML405, a V4
board.

See below.
-----Original Message-----
From: <redacted>
[mailto:linuxppc-embedded-
bounces+john.linn=3Dxilinx.com@ozlabs.org] On Behalf Of
vneethv@gmail.com
Sent: Thursday, September 04, 2008 12:40 AM
To: <redacted>
Subject: Porting linux on PPC405
=
Hi all,
=
I am trying to port Linux 2.6 on PPC405 processor.I have
EDK 10.1,
Xilinx University program board (with Virtex II Pro device)
linux kernel from Xilinx git. (git.xilinx.com)
Cross Compiler (Croostool)
fdt.dts file generated by EDK using with help of Xilinx fdt patch.
=


This is typical of a dts file problem. You should compare the dts file
to the ml405.dts file that is in the xilinx git tree.

I just looked at a dts generator issue and see that the following
property on the processor is wrong as it can be 0 in the generated file.
This number below is for a system at 300 Mhz.

timebase-frequency =3D <300000000>;
I could compile the kernel and could generate the zImage.
I've downloaded the hardware bit file and then the zImage to the DDR
SDRAM on the board using
Parallel 4 cable.
=
when i give the RUN command, this is what i get..
=
=
booting virtex
memstart=3D0x0
memsize=3D0x10000000
zImage starting: loaded at 0x00400000 (sp: 0x00578f1c)
Allocating 0x326564 bytes for kernel ...
gunzipping (0x00000000 <- 0x0040c000:0x005772bb)...done 0x3015c8 bytes
Linux/PowerPC load: console=3DttyS0 ip=3Don root=3D/dev/ram
Finalizing device tree... flat tree at 0x40ad68
=

Please also verify that you have specified the right amount of RAM for
the board in the dts file as that can cause a problem.  The memsize
shows 256 Mbyte, is that really correct?

The kernel could also be booting, but the console is at the wrong baud
rate as the UART in the device tree can be set to a baud rate that does
not agree with the boot args to the kernel.  No baud in the boot arg =3D
9600 baud.

I have some debug information on the wiki page at
http://xilinx.wikidot.com/debugging-kernel-boot-problems.

The booting process seems to be stopped after this. I the
bootarguments i've given are,
=
In dts file,
=
bootargs =3D "console=3DttyS0 ip=3Doff root=3D/dev/ram";
linux,stdout-path=3D"/plb@0/serial@83e00000";
=
Please let me know if've missed smthing here..!
n any clue on the reason why the boor process seems to be hanged here
!
=
Thanks in advance,
Vineeth
=
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RE: Porting linux on PPC405

From: vneethv <hidden>
Date: 2008-09-05 14:45:48

Hi John,

Thanks for the reply.
I've checked all the comments from you and it seems to be OK in our case.Bu=
t
still we face the same issue of hanging just after the execution of the
bootwrapper.
when i debugged, stepped using xmd i found the following..

=E2=80=A2=09Downloaded zImage using xmd
=E2=80=A2=09Started executing after =E2=80=98run=E2=80=99 command
=E2=80=A2=09Executed the "bootwrapper" part of zImage and unzipped the vmli=
nux and put
into location 0x0
=E2=80=A2=09Started executing vmlinux from 0x0
=E2=80=A2=09Executed the following functions (as per the symbols in the ass=
embly code)
=EF=82=A7=09initial_mmu
=EF=82=A7=09start_here=20
In start_here function @ location 0x0000223c the execution is branching to
=E2=80=9Cearly_init=E2=80=9D  which is located at 0x019d1b4. But when we ra=
n the step at
this location it goes to 0x00000700 (which is the exception vector for
illegal operation)=20
Please refer the attached =E2=80=9Cxmd_stp.jpg=E2=80=9D file and
=E2=80=9Cstart_here_from_vmlinux.dump=E2=80=9D file.

Is it because any configuration mistakes ??

Thanks & Regards
Vineeth

http://www.nabble.com/file/p19332811/xmd_stp.JPG xmd_stp.JPG=20
http://www.nabble.com/file/p19332811/start_here_from_vmlinux.dump
start_here_from_vmlinux.dump=20


John Linn wrote:
=20
Hi Vineeth,
=20
I don't directly support that board, but it's similar to the ML405 in
that it uses a 405 processor.  Since I don't test on that board or any
V2Pro board, I'm going to tell you my experience on the ML405, a V4
board.
=20
See below.
=20
quoted
-----Original Message-----
From: <redacted>
[mailto:linuxppc-embedded-
quoted
bounces+john.linn=3Dxilinx.com@ozlabs.org] On Behalf Of
vneethv@gmail.com
quoted
Sent: Thursday, September 04, 2008 12:40 AM
To: <redacted>
Subject: Porting linux on PPC405
=20
Hi all,
=20
I am trying to port Linux 2.6 on PPC405 processor.I have
EDK 10.1,
Xilinx University program board (with Virtex II Pro device)
linux kernel from Xilinx git. (git.xilinx.com)
Cross Compiler (Croostool)
fdt.dts file generated by EDK using with help of Xilinx fdt patch.
=20
=20
=20
This is typical of a dts file problem. You should compare the dts file
to the ml405.dts file that is in the xilinx git tree.
=20
I just looked at a dts generator issue and see that the following
property on the processor is wrong as it can be 0 in the generated file.
This number below is for a system at 300 Mhz.
=20
timebase-frequency =3D <300000000>;
=20
quoted
I could compile the kernel and could generate the zImage.

65 more quoted lines

--=20
View this message in context: http://www.nabble.com/Porting-linux-on-PPC405=
-tp19304412p19332811.html
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