[PATCH] AMCC PPC460GT/EX PCI-E de-emphasis adjustment fix

From: Tirumala R Marri <redacted>

During recent tests with PCI-E , it has been found the
DRV + De-Emphasis values are not optimum. These new values
are tested thouroughly.

Signed-off-by: Tirumala R Marri <redacted>
---
 arch/powerpc/sysdev/ppc4xx_pci.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index bdb3663..0ce3f46 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c

@@ -815,7 +815,7 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
 	switch (port->index) {
 	case 0:
 		mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230);
-		mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000136);
+		mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130);
 		mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006);
 
 		mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000);

@@ -826,10 +826,10 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
 		mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230);
 		mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230);
 		mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230);
-		mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000136);
-		mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000136);
-		mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000136);
-		mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000136);
+		mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000130);
+		mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000130);
+		mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000130);
+		mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000130);
 		mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006);
 		mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006);
 		mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006);

-- 
1.5.5

On Thu, Aug 21, 2008 at 09:53:34PM -0700, fkan@amcc.com wrote:

From: Tirumala R Marri <redacted>

During recent tests with PCI-E , it has been found the
DRV + De-Emphasis values are not optimum. These new values
are tested thouroughly.

Signed-off-by: Tirumala R Marri <redacted>

If you are sending out a patch for someone, you need to include your
Signed-off-by as well.  Just reply to this with it, no need to resend
the just for this.

Stefan, this looks good to me.  Or at least as far as I can tell from
the somewhat magic values :)  Any comments?

josh

Signed-off-by: Feng Kan <redacted>

________________________________

From: Josh Boyer [mailto:<redacted>]
Sent: Fri 8/22/2008 6:30 AM
To: Feng Kan
Cc: <redacted>; Tirumala Reddy Marri; sr@denx.de
Subject: Re: [PATCH] AMCC PPC460GT/EX PCI-E de-emphasis adjustment fix



On Thu, Aug 21, 2008 at 09:53:34PM -0700, fkan@amcc.com wrote:

From: Tirumala R Marri <redacted>

During recent tests with PCI-E , it has been found the
DRV + De-Emphasis values are not optimum. These new values
are tested thouroughly.

Signed-off-by: Tirumala R Marri <redacted>

If you are sending out a patch for someone, you need to include your
Signed-off-by as well.  Just reply to this with it, no need to resend
the just for this.

Stefan, this looks good to me.  Or at least as far as I can tell from
the somewhat magic values :)  Any comments?

josh

On Friday 22 August 2008, Josh Boyer wrote:

On Thu, Aug 21, 2008 at 09:53:34PM -0700, fkan@amcc.com wrote:

quoted

From: Tirumala R Marri <redacted>

During recent tests with PCI-E , it has been found the
DRV + De-Emphasis values are not optimum. These new values
are tested thouroughly.

Signed-off-by: Tirumala R Marri <redacted>

If you are sending out a patch for someone, you need to include your
Signed-off-by as well.  Just reply to this with it, no need to resend
the just for this.

Stefan, this looks good to me.  Or at least as far as I can tell from
the somewhat magic values :)  Any comments?

Looks good for me too, so:

Acked-by: Stefan Roese <sr@denx.de>

Best regards,
Stefan

How do I go about using one of the gpio pins for my own interrupt with the Canyonlands board.  Previously I used a yosemite (ppc) board and modified the yosemite.c file so that IRQ0 and IRQ1 were edge sensitive and and stole the ETH0/1 phy hardware interrupts for my own purposes and everything worked.

I am trying to do the same with the Canyonlands (powerpc) board.but cannot seem to enable the interrupt.

I am using the 2.6.26.2 denx kernel and xenomai 2.4.5

On Tuesday 26 August 2008, Henry Bausley wrote:

How do I go about using one of the gpio pins for my own interrupt with the
Canyonlands board.  Previously I used a yosemite (ppc) board and modified
the yosemite.c file so that IRQ0 and IRQ1 were edge sensitive and and stole
the ETH0/1 phy hardware interrupts for my own purposes and everything
worked.

I am trying to do the same with the Canyonlands (powerpc) board.but cannot
seem to enable the interrupt.

arch/powerpc now uses virtual interrupts instead of the physical interrupts 
used in arch/ppc. So you can't just use the physical interrupt number in your 
request_irq() anymore. You need an of-platform driver to generate the virtual 
interrupt from the physical interrupt in the device-tree 
(irq_of_parse_and_map()). And you need to add this new node with the 
interrupt property to your device-tree of course.

Best regards,
Stefan