how to check for "optional" ppc chip features (MSR_BE)

3 messages, 3 authors, 2008-05-04 · open the first message on its own page

how to check for "optional" ppc chip features (MSR_BE)

From: Roland McGrath <hidden>
Date: 2008-05-02 01:21:22

I've been looking at PowerISA_Public.pdf that I downloaded from some ppc
site.  It describes various things as "need not be supported on all
implementations", for example the MSR_BE bit.  Is there a generic way to
detect if such a feature is supported, or a known table of models that
support features, or what?

Right now I'm considering MSR_BE (branch tracing).  I have a patch to use
this (arch_has_block_step, enabling a PTRACE_SINGLEBLOCK).  The only
machine handy to test is a Mac G5 (PPC970FX, 3.0 (pvr 003c 0300)).  I know
this chip supports MSR_BE.  But that's only because I wrote an affirmative
test case and tried it and saw it work right.  

Before submitting the kernel changes, I want to get the CPU model
conditionalization correct (a runtime check on some feature bit mask is
fine here, if CONFIG_* alone does not indicate for sure).


Thanks,
Roland

Re: how to check for "optional" ppc chip features (MSR_BE)

From: Kumar Gala <hidden>
Date: 2008-05-02 03:48:18

On May 1, 2008, at 8:21 PM, Roland McGrath wrote:
I've been looking at PowerISA_Public.pdf that I downloaded from some ppc
site.  It describes various things as "need not be supported on all
implementations", for example the MSR_BE bit.  Is there a generic way to
detect if such a feature is supported, or a known table of models that
support features, or what?

Right now I'm considering MSR_BE (branch tracing).  I have a patch to use
this (arch_has_block_step, enabling a PTRACE_SINGLEBLOCK).  The only
machine handy to test is a Mac G5 (PPC970FX, 3.0 (pvr 003c 0300)).  I know
this chip supports MSR_BE.  But that's only because I wrote an affirmative
test case and tried it and saw it work right.
Look at arch/powerpc/kernel/cputable.c to see how we handle issues like this.
Before submitting the kernel changes, I want to get the CPU model
conditionalization correct (a runtime check on some feature bit mask is
fine here, if CONFIG_* alone does not indicate for sure).
I believe all PPC that implement MSR[SE] also support MSR[BE].  The "Book-E" class PPCs have a different mechanism to single branch completion (these are embedded PPC products).

I've been working on changes related to the Book-E class machines and would be happy to try and port what you're looking over.

- k

Re: how to check for "optional" ppc chip features (MSR_BE)

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2008-05-04 21:45:56

On Thu, 2008-05-01 at 22:48 -0500, Kumar Gala wrote:
Look at arch/powerpc/kernel/cputable.c to see how we handle issues  
like this.
Oh and classic pitfall: If you define a new feature bit, make sure
CPU_FTRS_POSSIBLE is updated to contain it in cputable.h

Also, It may not be totally clear, but:

PPC_FEATURE_* are exposed to userspace via AT_HWCAP

CPU_FTR_* are kernel internal (and can be used for runtime patching of
assembly code).

Ben.
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