[[PATCH] corrected MPC8313 NAND fixes
From: Mike Hench <hidden>
Date: 2008-03-19 17:39:28
Fix a race condition in fsl_elbc_run_command Fix incorrect usage of clearbits32 that bashed option register Remove work around for bashed register Signed-off-by: Mike Hench <redacted> ---
--- linux-2.6.25-rc5.orig/drivers/mtd/nand/fsl_elbc_nand.c2008-03-10 00:22:27.000000000 -0500
+++ linux-2.6.25-rc5/drivers/mtd/nand/fsl_elbc_nand.c 2008-03-1912:34:36.000000000 -0500
@@ -379,11 +379,11 @@ static int fsl_elbc_run_command(struct m in_be32(&lbc->fbar), in_be32(&lbc->fpar), in_be32(&lbc->fbcr), priv->bank);
=20 + ctrl->irq_status =3D 0; /* execute special operation */ out_be32(&lbc->lsor, priv->bank); =20 /* wait for FCM complete flag or timeout */ - ctrl->irq_status =3D 0; wait_event_timeout(ctrl->irq_wait, ctrl->irq_status, FCM_TIMEOUT_MSECS * HZ/1000); ctrl->status =3D ctrl->irq_status;
@@ -861,7 +861,7 @@ static int fsl_elbc_chip_init_tail(struc /* adjust Option Register and ECC to match Flash page size */ if (mtd->writesize =3D=3D 512) { priv->page_size =3D 0; - clrbits32(&lbc->bank[priv->bank].or, ~OR_FCM_PGS); + clrbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); } else if (mtd->writesize =3D=3D 2048) { priv->page_size =3D 1; setbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS);
@@ -882,11 +882,6 @@ static int fsl_elbc_chip_init_tail(struc return -1; }
=20 - /* The default u-boot configuration on MPC8313ERDB causes errors; - * more delay is needed. This should be safe for other boards - * as well. - */ - setbits32(&lbc->bank[priv->bank].or, 0x70); return 0; }