3 messages, 3 authors, 2008-03-16 · open the first message on its own page
From: Roland McGrath <hidden>
Date: 2008-03-14 07:45:53
In both these cases, the storage access goes to LSU0, so you're not hitting the errata.
I'll take your word for it.
If this doesn't help, and the failures stay intermittent, I don't think there is a close-to-the-hardware problem here.
I saw no effect from that change. So now we're back to pure mystery, I guess. Thanks, Roland
From: Segher Boessenkool <hidden>
Date: 2008-03-14 08:43:37
quoted
If this doesn't help, and the failures stay intermittent, I don't think there is a close-to-the-hardware problem here.I saw no effect from that change. So now we're back to pure mystery, I guess.
Hey, we know something now: it's "just" a problem in the kernel :-) Segher
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2008-03-16 20:39:26
On Fri, 2008-03-14 at 09:42 +0100, Segher Boessenkool wrote:
quoted
I saw no effect from that change. So now we're back to puremystery,quoted
I guess.Hey, we know something now: it's "just" a problem in the kernel :-)
We don't know that for sure. The DABR context switching code is trivial enough... Ben.