[PATCH] Fix for Freescale ppc cores: major revision detection

Ppc cores by Freescale are using the configuration field instead of the 
major revision field for their major revision number. Those field 
definitions come from include/asm-powerpc/reg.h.

Look at the pdf below and you will see that PVR_MAJ() does a wrong shift 
for ppc cores by Freescale. This patch fixes it.

http://www.freescale.com/files/archives/doc/support_info/PPCPVR.pdf


Signed-Off-By: Martin Langer <redacted>

--- arch/powerpc/kernel/setup-common.c.ORIGINAL	2008-02-08 22:22:56.000000000 +0100
+++ arch/powerpc/kernel/setup-common.c	2008-02-09 18:18:36.000000000 +0100

@@ -241,7 +241,7 @@
 	/* If we are a Freescale core do a simple check so
 	 * we dont have to keep adding cases in the future */
 	if (PVR_VER(pvr) & 0x8000) {
-		maj = PVR_MAJ(pvr);
+		maj = (pvr >> 8) & 0xF;
 		min = PVR_MIN(pvr);
 	} else {
 		switch (PVR_VER(pvr)) {

On Feb 9, 2008, at 11:47 AM, Martin Langer wrote:

Ppc cores by Freescale are using the configuration field instead of  
the
major revision field for their major revision number. Those field
definitions come from include/asm-powerpc/reg.h.

Look at the pdf below and you will see that PVR_MAJ() does a wrong  
shift
for ppc cores by Freescale. This patch fixes it.

http://www.freescale.com/files/archives/doc/support_info/PPCPVR.pdf

This doc doesn't encompass the e500/book-e cores that don't follow the  
same pattern.

The code should probably be something like:

#ifdef CONFIG_FSL_BOOKE
maj = PVR_MAJ(pvr);
#else
maj = (pvr >> 8) & 0xff;
#endif