[PATCH] [POWERPC] FSL: Access PCIe LTSSM register with correct size
From: Kumar Gala <hidden>
Date: 2007-10-04 05:30:30
Subsystem:
linux for powerpc (32-bit and 64-bit), the rest · Maintainers:
Madhavan Srinivasan, Linus Torvalds
The LTSSM register is actual 32-bits wide so we should be doing a dword access. --- arch/powerpc/sysdev/fsl_pci.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) minor cleanup patch
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 98290f4..af090c9 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c@@ -160,8 +160,8 @@ static void __init quirk_fsl_pcie_transparent(struct pci_dev *dev) int __init fsl_pcie_check_link(struct pci_controller *hose) { - u16 val; - early_read_config_word(hose, 0, 0, PCIE_LTSSM, &val); + u32 val; + early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val); if (val < PCIE_LTSSM_L0) return 1; return 0;
--
1.5.2.4