[PATCH 0/2] PowerPC: Fix MAL0 DTS entries for Bamboo and Sequoia.

A couple of minor fixes to correct MAL0 DTS entries for bamboo.dts and sequoia.dts.
Also correct MAL channel assignment for EMACs on Sequoia board.

According to PowerPC 440EP documentation,
MAL0 consists of 6 channels (4 transmit channels and 2 receive channels)
This patch fixes Bamboo DTS MAL0 "num-rx-chans" entry.

Signed-off-by: Valentine Barshak <redacted>
---
 arch/powerpc/boot/dts/bamboo.dts |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)

diff -ruN linux-2.6.orig/arch/powerpc/boot/dts/bamboo.dts linux-2.6/arch/powerpc/boot/dts/bamboo.dts

--- linux-2.6.orig/arch/powerpc/boot/dts/bamboo.dts	2007-09-18 15:32:18.000000000 +0400
+++ linux-2.6/arch/powerpc/boot/dts/bamboo.dts	2007-09-18 21:08:55.000000000 +0400

@@ -94,7 +94,7 @@
 			compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
 			dcr-reg = <180 62>;
 			num-tx-chans = <4>;
-			num-rx-chans = <4>;
+			num-rx-chans = <2>;
 			interrupt-parent = <&MAL0>;
 			interrupts = <0 1 2 3 4>;
 			#interrupt-cells = <1>;

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive).
Each channel is dedicated to one of two EMAC cores.
This patch fixes Sequoia DTS MAL0 entry and EMAC entries,
assigning correct channel numbers to EMACs.

Signed-off-by: Valentine Barshak <redacted>
---
 arch/powerpc/boot/dts/sequoia.dts |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff -ruN linux-2.6.orig/arch/powerpc/boot/dts/sequoia.dts linux-2.6/arch/powerpc/boot/dts/sequoia.dts

--- linux-2.6.orig/arch/powerpc/boot/dts/sequoia.dts	2007-09-18 15:32:18.000000000 +0400
+++ linux-2.6/arch/powerpc/boot/dts/sequoia.dts	2007-09-18 21:11:00.000000000 +0400

@@ -107,8 +107,8 @@
 		MAL0: mcmal {
 			compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
 			dcr-reg = <180 62>;
-			num-tx-chans = <4>;
-			num-rx-chans = <4>;
+			num-tx-chans = <2>;
+			num-rx-chans = <2>;
 			interrupt-parent = <&MAL0>;
 			interrupts = <0 1 2 3 4>;
 			#interrupt-cells = <1>;

@@ -239,7 +239,7 @@
 				reg = <ef600e00 70>;
 				local-mac-address = [000000000000];
 				mal-device = <&MAL0>;
-				mal-tx-channel = <0 1>;
+				mal-tx-channel = <0>;
 				mal-rx-channel = <0>;
 				cell-index = <0>;
 				max-frame-size = <5dc>;

@@ -265,7 +265,7 @@
 				reg = <ef600f00 70>;
 				local-mac-address = [000000000000];
 				mal-device = <&MAL0>;
-				mal-tx-channel = <2 3>;
+				mal-tx-channel = <1>;
 				mal-rx-channel = <1>;
 				cell-index = <1>;
 				max-frame-size = <5dc>;

On Tue, Sep 18, 2007 at 09:29:13PM +0400, Valentine Barshak wrote:

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive).
Each channel is dedicated to one of two EMAC cores.
This patch fixes Sequoia DTS MAL0 entry and EMAC entries,
assigning correct channel numbers to EMACs.

Hrm.. did they change the EMAC in 440EPx to only use one MAL
tx-channel?  All the older ones could use two (for no readily apparent
reason, IMO).

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

David Gibson wrote:

On Tue, Sep 18, 2007 at 09:29:13PM +0400, Valentine Barshak wrote:

quoted

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive).
Each channel is dedicated to one of two EMAC cores.
This patch fixes Sequoia DTS MAL0 entry and EMAC entries,
assigning correct channel numbers to EMACs.

Hrm.. did they change the EMAC in 440EPx to only use one MAL
tx-channel?  All the older ones could use two (for no readily apparent
reason, IMO).

Yes, they did.
Just 1 tx and 1 rx-channel per EMAC. Just 2 bits to select channels, 
while all other bits in MAL registers are reserved.
I'm not sure why they did it (possible bus bandwidth problems), but it's 
impossible to set more than 1 rx/tx channel for each EMAC in 440EPx.

Valentine Barshak wrote:

David Gibson wrote:

quoted

On Tue, Sep 18, 2007 at 09:29:13PM +0400, Valentine Barshak wrote:

quoted

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive).
Each channel is dedicated to one of two EMAC cores.
This patch fixes Sequoia DTS MAL0 entry and EMAC entries,
assigning correct channel numbers to EMACs.

Hrm.. did they change the EMAC in 440EPx to only use one MAL
tx-channel?  All the older ones could use two (for no readily apparent
reason, IMO).

Yes, they did.
Just 1 tx and 1 rx-channel per EMAC. Just 2 bits to select channels, 
while all other bits in MAL registers are reserved.
I'm not sure why they did it (possible bus bandwidth problems), but it's 
impossible to set more than 1 rx/tx channel for each EMAC in 440EPx.

Josh, David, is this patch OK?

On Thu, 20 Sep 2007 22:46:18 +0400
Valentine Barshak [off-list ref] wrote:

Valentine Barshak wrote:

quoted

David Gibson wrote:

quoted

On Tue, Sep 18, 2007 at 09:29:13PM +0400, Valentine Barshak wrote:

quoted

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive).
Each channel is dedicated to one of two EMAC cores.
This patch fixes Sequoia DTS MAL0 entry and EMAC entries,
assigning correct channel numbers to EMACs.

Hrm.. did they change the EMAC in 440EPx to only use one MAL
tx-channel?  All the older ones could use two (for no readily apparent
reason, IMO).

Yes, they did.
Just 1 tx and 1 rx-channel per EMAC. Just 2 bits to select channels, 
while all other bits in MAL registers are reserved.
I'm not sure why they did it (possible bus bandwidth problems), but it's 
impossible to set more than 1 rx/tx channel for each EMAC in 440EPx.

Josh, David, is this patch OK?

Yeah.  I applied it to my tree and asked Paul to pull.  Same for the
Bamboo one.

josh

Josh Boyer wrote:

On Thu, 20 Sep 2007 22:46:18 +0400
Valentine Barshak [off-list ref] wrote:

quoted

Valentine Barshak wrote:

quoted

David Gibson wrote:

quoted

On Tue, Sep 18, 2007 at 09:29:13PM +0400, Valentine Barshak wrote:

quoted

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive).
Each channel is dedicated to one of two EMAC cores.
This patch fixes Sequoia DTS MAL0 entry and EMAC entries,
assigning correct channel numbers to EMACs.

Hrm.. did they change the EMAC in 440EPx to only use one MAL
tx-channel?  All the older ones could use two (for no readily apparent
reason, IMO).

Yes, they did.
Just 1 tx and 1 rx-channel per EMAC. Just 2 bits to select channels, 
while all other bits in MAL registers are reserved.
I'm not sure why they did it (possible bus bandwidth problems), but it's 
impossible to set more than 1 rx/tx channel for each EMAC in 440EPx.

Josh, David, is this patch OK?

Yeah.  I applied it to my tree and asked Paul to pull.  Same for the
Bamboo one.

josh

OK thanks :)