When booting a Power6 in compat mode, the DFP bit must be set in the
client architecture call, or else firmware will downgrade the compliance
to P5 compat mode, thus removing VMX and DFP instructions.
Signed-off-by: Jake Moilanen <redacted>
From: Kumar Gala <hidden> Date: 2006-11-22 15:25:16
On Nov 22, 2006, at 9:20 AM, Jake Moilanen wrote:
When booting a Power6 in compat mode, the DFP bit must be set in the
client architecture call, or else firmware will downgrade the compliance
to P5 compat mode, thus removing VMX and DFP instructions.
Signed-off-by: Jake Moilanen <redacted>
For DFP do we also need a cpu_user_features, that propagates out to user space?
- k
From: Kumar Gala <hidden> Date: 2006-11-22 15:45:48
On Nov 22, 2006, at 9:20 AM, Jake Moilanen wrote:
quoted hunk
When booting a Power6 in compat mode, the DFP bit must be set in the
client architecture call, or else firmware will downgrade the compliance
to P5 compat mode, thus removing VMX and DFP instructions.
Signed-off-by: Jake Moilanen <redacted>
On Wed, 2006-11-22 at 09:46 -0600, Kumar Gala wrote:
On Nov 22, 2006, at 9:20 AM, Jake Moilanen wrote:
quoted
When booting a Power6 in compat mode, the DFP bit must be set in the
client architecture call, or else firmware will downgrade the
compliance
to P5 compat mode, thus removing VMX and DFP instructions.
Signed-off-by: Jake Moilanen <redacted>
From: Peter Bergner <hidden> Date: 2006-11-22 16:06:13
On Wed, 2006-11-22 at 09:46 -0600, Kumar Gala wrote:
On Nov 22, 2006, at 9:20 AM, Jake Moilanen wrote:
quoted
When booting a Power6 in compat mode, the DFP bit must be set in the
client architecture call, or else firmware will downgrade the
compliance
to P5 compat mode, thus removing VMX and DFP instructions.
Signed-off-by: Jake Moilanen <redacted>
Can we make the flag OV3_DECFP to distinguish it from Double FP.
One thing OV3_DFP has going for it is that is matches the nomenclature
used by GCC, binutils. I'm not sure what you mean by Double FP, unless
you're referring to the double wide FP unit on the Blue Gene/L 440
processor, but they don't refer to it as Double FP.
Peter
From: Kumar Gala <hidden> Date: 2006-11-22 16:40:48
On Nov 22, 2006, at 10:06 AM, Peter Bergner wrote:
On Wed, 2006-11-22 at 09:46 -0600, Kumar Gala wrote:
quoted
On Nov 22, 2006, at 9:20 AM, Jake Moilanen wrote:
quoted
When booting a Power6 in compat mode, the DFP bit must be set in the
client architecture call, or else firmware will downgrade the
compliance
to P5 compat mode, thus removing VMX and DFP instructions.
Signed-off-by: Jake Moilanen <redacted>
Can we make the flag OV3_DECFP to distinguish it from Double FP.
One thing OV3_DFP has going for it is that is matches the nomenclature
used by GCC, binutils. I'm not sure what you mean by Double FP, unless
you're referring to the double wide FP unit on the Blue Gene/L 440
processor, but they don't refer to it as Double FP.
I'm referring to plain old double precision floating point. The e500 core from Freescale has version that provide embedded single precision floating point (EFP_SINGLE) and versions that provide both embedded double precision floating point (EFP_DOUBLE). I just want use to be clear the DFP could mean either double or decimal as far as I'm concerned.
Also, I think the 602 (may have never seen the light of day) only implemented single precision floating point.
- k
From: Will Schmidt <hidden> Date: 2006-11-22 18:36:15
On Wed, 2006-22-11 at 10:41 -0600, Kumar Gala wrote:
On Nov 22, 2006, at 10:06 AM, Peter Bergner wrote:
quoted
On Wed, 2006-11-22 at 09:46 -0600, Kumar Gala wrote:
quoted
On Nov 22, 2006, at 9:20 AM, Jake Moilanen wrote:
quoted
When booting a Power6 in compat mode, the DFP bit must be set in the
client architecture call, or else firmware will downgrade the
compliance
to P5 compat mode, thus removing VMX and DFP instructions.
Signed-off-by: Jake Moilanen <redacted>
Can we make the flag OV3_DECFP to distinguish it from Double FP.
One thing OV3_DFP has going for it is that is matches the nomenclature
used by GCC, binutils. I'm not sure what you mean by Double FP,
unless
you're referring to the double wide FP unit on the Blue Gene/L 440
processor, but they don't refer to it as Double FP.
I'm referring to plain old double precision floating point. The e500
core from Freescale has version that provide embedded single
precision floating point (EFP_SINGLE) and versions that provide both
embedded double precision floating point (EFP_DOUBLE). I just want
use to be clear the DFP could mean either double or decimal as far as
I'm concerned.
the comment on the #define "/* decimal floating point */" should be
sufficient for that clarification tho, right?
Also, I think the 602 (may have never seen the light of day) only
implemented single precision floating point.
- k
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From: Will Schmidt <hidden> Date: 2006-11-22 18:37:04
On Wed, 2006-22-11 at 09:20 -0600, Jake Moilanen wrote:
When booting a Power6 in compat mode, the DFP bit must be set in the
client architecture call, or else firmware will downgrade the compliance
to P5 compat mode, thus removing VMX and DFP instructions.
Signed-off-by: Jake Moilanen <redacted>
From: Kumar Gala <hidden> Date: 2006-11-22 18:50:41
On Nov 22, 2006, at 12:36 PM, Will Schmidt wrote:
On Wed, 2006-22-11 at 10:41 -0600, Kumar Gala wrote:
quoted
On Nov 22, 2006, at 10:06 AM, Peter Bergner wrote:
quoted
On Wed, 2006-11-22 at 09:46 -0600, Kumar Gala wrote:
quoted
On Nov 22, 2006, at 9:20 AM, Jake Moilanen wrote:
quoted
When booting a Power6 in compat mode, the DFP bit must be set in the
client architecture call, or else firmware will downgrade the
compliance
to P5 compat mode, thus removing VMX and DFP instructions.
Signed-off-by: Jake Moilanen <redacted>
Can we make the flag OV3_DECFP to distinguish it from Double FP.
One thing OV3_DFP has going for it is that is matches the nomenclature
used by GCC, binutils. I'm not sure what you mean by Double FP,
unless
you're referring to the double wide FP unit on the Blue Gene/L 440
processor, but they don't refer to it as Double FP.
I'm referring to plain old double precision floating point. The e500
core from Freescale has version that provide embedded single
precision floating point (EFP_SINGLE) and versions that provide both
embedded double precision floating point (EFP_DOUBLE). I just want
use to be clear the DFP could mean either double or decimal as far as
I'm concerned.
the comment on the #define "/* decimal floating point */" should be
sufficient for that clarification tho, right?
For this one case it is, but I'm sure we are going to end up with some other defines for related to Decimal FP and I'd like them to be clear.
quoted
Also, I think the 602 (may have never seen the light of day) only
implemented single precision floating point.
- k
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From: Paul Mackerras <hidden> Date: 2006-11-22 21:45:58
Jake Moilanen writes:
When booting a Power6 in compat mode, the DFP bit must be set in the
client architecture call, or else firmware will downgrade the compliance
to P5 compat mode, thus removing VMX and DFP instructions.
This change is already in the powerpc.git tree; it was part of my
"Distinguish POWER6 partition modes and tell userspace" patch.
Paul.
From: Paul Mackerras <hidden> Date: 2006-11-22 21:48:59
Kumar Gala writes:
Can we make the flag OV3_DECFP to distinguish it from Double FP.
I don't think it's worth it; the OV3_DFP name is defined and used only
in prom_init.c, and only in the context of the code for doing the
ibm,client-architecture-support call. Anyway, the comment says what
it's about, so I don't think there's any potential for confusion.
Paul.
Also, I think the 602 (may have never seen the light of day)
I never saw any 602 in the wild, and no one I ever asked has.
only implemented single precision floating point.
Actually, it implements double precision just fine (although
all double precision arithmetic operations trap and have to
be emulated). Loads and stores work, the FPRs are 64 bit.
Anyway, off-topic, and this CPU doesn't actually exist anyway.
Segher