Paul,
The series of patches add generic QE infrastructure called
qe_lib, and MPC8360EMDS board support. Qe_lib is used by
QE device drivers such as ucc_geth driver.
This version updates QE interrupt controller to use new irq
mapping mechanism, addresses all the comments received with
last submission and includes some style fixes.
v2: Change to use device tree for BCSR and MURAM;
Remove I/O port interrupt handling code as it is not generic
enough.
v3: Address comments from Kumar; Update definition of several
device tree nodes; Copyright style change.
- Leo
On Sep 29, 2006, at 5:34 AM, Li Yang wrote:
Paul,
The series of patches add generic QE infrastructure called
qe_lib, and MPC8360EMDS board support. Qe_lib is used by
QE device drivers such as ucc_geth driver.
This version updates QE interrupt controller to use new irq
mapping mechanism, addresses all the comments received with
last submission and includes some style fixes.
v2: Change to use device tree for BCSR and MURAM;
Remove I/O port interrupt handling code as it is not generic
enough.
v3: Address comments from Kumar; Update definition of several
device tree nodes; Copyright style change.
In going through this code some general comments:
* remove typedef's, its not the normal convention to use typedefs the
way this code is. Makes it more difficult to read
* look at use of uint vs u32. I think there are a number of cases
were you really want u32.
Also, can you provide some high level description of what all this
code is doing. I understand the port io init, I get the interrupt
handling. I'm at a loss as that what all the channel ucc_fast/
ucc_slow code is trying to do and some of the init code.
- k
On 9/29/06, Kumar Gala [off-list ref] wrote:
On Sep 29, 2006, at 5:34 AM, Li Yang wrote:
quoted
Paul,
The series of patches add generic QE infrastructure called
qe_lib, and MPC8360EMDS board support. Qe_lib is used by
QE device drivers such as ucc_geth driver.
This version updates QE interrupt controller to use new irq
mapping mechanism, addresses all the comments received with
last submission and includes some style fixes.
v2: Change to use device tree for BCSR and MURAM;
Remove I/O port interrupt handling code as it is not generic
enough.
v3: Address comments from Kumar; Update definition of several
device tree nodes; Copyright style change.
In going through this code some general comments:
* remove typedef's, its not the normal convention to use typedefs the
way this code is. Makes it more difficult to read
* look at use of uint vs u32. I think there are a number of cases
were you really want u32.
Also, can you provide some high level description of what all this
code is doing. I understand the port io init, I get the interrupt
handling. I'm at a loss as that what all the channel ucc_fast/
ucc_slow code is trying to do and some of the init code.
Well, in brief. There are many flexible options for QE SoC UCC. Such
as clock routing, pin multiplexing, virtual fifo, BD rings, etc. The
ucc code provides generic initialization and configuration routines
for these common options to be reused through drivers. The
encapsulation of register manipulating code also makes the code more
readable.
- Leo