[PATCH] maple u3 ht - reject inappropriate config space access
From: Nathan Lynch <hidden>
Date: 2006-09-21 19:25:44
When there is a PCI-X mode 2 capable device behind the HT<->PCI-X bridge, the pci core decides that the device has the extended 4K config space, even though the bus is not operating in mode 2. This is because the u3_ht pci ops silently accept offsets greater than 255 but use only the 8 least significant bits, which means reading at offset 0x100 gets the data at offset 0x0, and causes confusion for lspci. Reject accesses to configuration space offsets greater than 255. Signed-off-by: Nathan Lynch <redacted>
--- linux-2.6.git.orig/arch/powerpc/platforms/maple/pci.c
+++ linux-2.6.git/arch/powerpc/platforms/maple/pci.c@@ -211,6 +211,9 @@ static int u3_ht_read_config(struct pci_ if (hose == NULL) return PCIBIOS_DEVICE_NOT_FOUND; + if (offset > 0xff) + return PCIBIOS_BAD_REGISTER_NUMBER; + addr = u3_ht_cfg_access(hose, bus->number, devfn, offset); if (!addr) return PCIBIOS_DEVICE_NOT_FOUND;
@@ -243,6 +246,9 @@ static int u3_ht_write_config(struct pci if (hose == NULL) return PCIBIOS_DEVICE_NOT_FOUND; + if (offset > 0xff) + return PCIBIOS_BAD_REGISTER_NUMBER; + addr = u3_ht_cfg_access(hose, bus->number, devfn, offset); if (!addr) return PCIBIOS_DEVICE_NOT_FOUND;