From: Ben Warren <hidden> Date: 2006-08-23 22:16:46
Hello,
I have a custom board where we've hung a CompactFlash on the local bus
of an MPC8349 processor, intending to use it in 'True IDE' mode. The
closest thing I've found in the kernel tree is
drivers/ide/ppc/ide-m8xx.c, although it's *very* possible I'm not
looking in the right place.
I believe my chip's local bus is similar to the 8xx, so making this
driver work with my hardware doesn't seem like that big a deal. I fully
expect to have to monkey with UPM timings among other things. On the
other hand, this seems like something other people would have done,
maybe with one of the other PQ families like 82xx or 85xx.
Does anyone have a patch, suggestions or flames they can throw my way?
cheers,
Ben
From: Kumar Gala <hidden> Date: 2006-08-23 23:04:53
On Aug 23, 2006, at 5:16 PM, Ben Warren wrote:
Hello,
I have a custom board where we've hung a CompactFlash on the local bus
of an MPC8349 processor, intending to use it in 'True IDE' mode. The
closest thing I've found in the kernel tree is
drivers/ide/ppc/ide-m8xx.c, although it's *very* possible I'm not
looking in the right place.
I believe my chip's local bus is similar to the 8xx, so making this
driver work with my hardware doesn't seem like that big a deal. I
fully
expect to have to monkey with UPM timings among other things. On the
other hand, this seems like something other people would have done,
maybe with one of the other PQ families like 82xx or 85xx.
Does anyone have a patch, suggestions or flames they can throw my way?
I know I posted a patch for cf-ide.c to lkml some time ago, this was
to do a CF in true ide mode using the 83xx localbus.
http://marc.theaimsgroup.com/?l=linux-kernel&m=113877891224982&w=2
We did some UPM setup in u-boot to use two CS on Localbus for this.
- kumar
In our case, we only have one CS available but it's going to a CPLD that
will decode and provide two CSs to the CF. This will work as long as
the UPM setup is identical for the two chip selects. Should be...
Off-topic to this list, but do you have the U-boot code that you can
share? If not, no worries.
thanks,
Ben
In our case, we only have one CS available but it's going to a CPLD
that
will decode and provide two CSs to the CF. This will work as long as
the UPM setup is identical for the two chip selects. Should be...
Off-topic to this list, but do you have the U-boot code that you can
share? If not, no worries.
The only code in u-boot was the UPM setup code, I'm happy to send
that to you.
- kumar
From: Ben Warren <hidden> Date: 2006-08-24 18:35:37
Kumar,
On Thu, 2006-08-24 at 13:25 -0500, Kumar Gala wrote:
The only code in u-boot was the UPM setup code, I'm happy to send
that to you.
If it's no trouble, that would be great. My HW guy is calculating the
settings, but this stuff can be frustrating to debug. BTW - was the
system bus speed for your CPU 33 or 66 MHz? We're targeting for a
400MHz 8349 which has a 33MHz system bus.
From: Kumar Gala <hidden> Date: 2006-08-25 16:39:34
On Aug 24, 2006, at 1:35 PM, Ben Warren wrote:
Kumar,
On Thu, 2006-08-24 at 13:25 -0500, Kumar Gala wrote:
quoted
The only code in u-boot was the UPM setup code, I'm happy to send
that to you.
If it's no trouble, that would be great. My HW guy is calculating the
settings, but this stuff can be frustrating to debug. BTW - was the
system bus speed for your CPU 33 or 66 MHz? We're targeting for a
400MHz 8349 which has a 33MHz system bus.
I think we were running @ 66Mhz, but I've run the FSL ref board @ 33MHZ.
- k