[PATCH] corrected PCI interrupt sense values to level low in mpc8349emds.dts

Subsystems: linux for powerpc (32-bit and 64-bit), the rest

STALE7276d

9 messages, 6 authors, 2006-08-31 · open the first message on its own page

[PATCH] corrected PCI interrupt sense values to level low in mpc8349emds.dts

From: Kim Phillips <hidden>
Date: 2006-08-28 22:49:16

Corrected PCI interrupt sense values to level low in mpc8349emds.dts, per Leo's recommendation.

Signed-off-by: Kim Phillips <redacted>
---

applies on top of "[PATCH 4/4] Add MPC8349E MDS device tree source file to arch/powerpc/boot/dts"


 arch/powerpc/boot/dts/mpc8349emds.dts |  112 +++++++++++++++++----------------
 1 files changed, 56 insertions(+), 56 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8349emds.dts b/arch/powerpc/boot/dts/mpc8349emds.dts
index 7e4508b..0643db9 100644
--- a/arch/powerpc/boot/dts/mpc8349emds.dts
+++ b/arch/powerpc/boot/dts/mpc8349emds.dts
@@ -178,46 +178,46 @@
 			interrupt-map = <
 
 					/* IDSEL 0x11 */
-					 8800 0 0 1 700 14 0
-					 8800 0 0 2 700 15 0
-					 8800 0 0 3 700 16 0
-					 8800 0 0 4 700 17 0
+					 8800 0 0 1 700 14 2
+					 8800 0 0 2 700 15 2
+					 8800 0 0 3 700 16 2
+					 8800 0 0 4 700 17 2
 
 					/* IDSEL 0x12 */
-					 9000 0 0 1 700 16 0
-					 9000 0 0 2 700 17 0
-					 9000 0 0 3 700 14 0
-					 9000 0 0 4 700 15 0
+					 9000 0 0 1 700 16 2
+					 9000 0 0 2 700 17 2
+					 9000 0 0 3 700 14 2
+					 9000 0 0 4 700 15 2
 
 					/* IDSEL 0x13 */
-					 9800 0 0 1 700 17 0
-					 9800 0 0 2 700 14 0
-					 9800 0 0 3 700 15 0
-					 9800 0 0 4 700 16 0
+					 9800 0 0 1 700 17 2
+					 9800 0 0 2 700 14 2
+					 9800 0 0 3 700 15 2
+					 9800 0 0 4 700 16 2
 
 					/* IDSEL 0x15 */
-					 a800 0 0 1 700 14 0
-					 a800 0 0 2 700 15 0
-					 a800 0 0 3 700 16 0
-					 a800 0 0 4 700 17 0
+					 a800 0 0 1 700 14 2
+					 a800 0 0 2 700 15 2
+					 a800 0 0 3 700 16 2
+					 a800 0 0 4 700 17 2
 
 					/* IDSEL 0x16 */
-					 b000 0 0 1 700 17 0
-					 b000 0 0 2 700 14 0
-					 b000 0 0 3 700 15 0
-					 b000 0 0 4 700 16 0
+					 b000 0 0 1 700 17 2
+					 b000 0 0 2 700 14 2
+					 b000 0 0 3 700 15 2
+					 b000 0 0 4 700 16 2
 
 					/* IDSEL 0x17 */
-					 b800 0 0 1 700 16 0
-					 b800 0 0 2 700 17 0
-					 b800 0 0 3 700 14 0
-					 b800 0 0 4 700 15 0
+					 b800 0 0 1 700 16 2
+					 b800 0 0 2 700 17 2
+					 b800 0 0 3 700 14 2
+					 b800 0 0 4 700 15 2
 
 					/* IDSEL 0x18 */
-					 b000 0 0 1 700 15 0
-					 b000 0 0 2 700 16 0
-					 b000 0 0 3 700 17 0
-					 b000 0 0 4 700 14 0>;
+					 b000 0 0 1 700 15 2
+					 b000 0 0 2 700 16 2
+					 b000 0 0 3 700 17 2
+					 b000 0 0 4 700 14 2>;
 			interrupt-parent = <700>;
 			interrupts = <42 8>;
 			bus-range = <0 0>;
@@ -238,46 +238,46 @@
 			interrupt-map = <
 
 					/* IDSEL 0x11 */
-					 8800 0 0 1 700 14 0
-					 8800 0 0 2 700 15 0
-					 8800 0 0 3 700 16 0
-					 8800 0 0 4 700 17 0
+					 8800 0 0 1 700 14 2
+					 8800 0 0 2 700 15 2
+					 8800 0 0 3 700 16 2
+					 8800 0 0 4 700 17 2
 
 					/* IDSEL 0x12 */
-					 9000 0 0 1 700 16 0
-					 9000 0 0 2 700 17 0
-					 9000 0 0 3 700 14 0
-					 9000 0 0 4 700 15 0
+					 9000 0 0 1 700 16 2
+					 9000 0 0 2 700 17 2
+					 9000 0 0 3 700 14 2
+					 9000 0 0 4 700 15 2
 
 					/* IDSEL 0x13 */
-					 9800 0 0 1 700 17 0
-					 9800 0 0 2 700 14 0
-					 9800 0 0 3 700 15 0
-					 9800 0 0 4 700 16 0
+					 9800 0 0 1 700 17 2
+					 9800 0 0 2 700 14 2
+					 9800 0 0 3 700 15 2
+					 9800 0 0 4 700 16 2
 
 					/* IDSEL 0x15 */
-					 a800 0 0 1 700 14 0
-					 a800 0 0 2 700 15 0
-					 a800 0 0 3 700 16 0
-					 a800 0 0 4 700 17 0
+					 a800 0 0 1 700 14 2
+					 a800 0 0 2 700 15 2
+					 a800 0 0 3 700 16 2
+					 a800 0 0 4 700 17 2
 
 					/* IDSEL 0x16 */
-					 b000 0 0 1 700 17 0
-					 b000 0 0 2 700 14 0
-					 b000 0 0 3 700 15 0
-					 b000 0 0 4 700 16 0
+					 b000 0 0 1 700 17 2
+					 b000 0 0 2 700 14 2
+					 b000 0 0 3 700 15 2
+					 b000 0 0 4 700 16 2
 
 					/* IDSEL 0x17 */
-					 b800 0 0 1 700 16 0
-					 b800 0 0 2 700 17 0
-					 b800 0 0 3 700 14 0
-					 b800 0 0 4 700 15 0
+					 b800 0 0 1 700 16 2
+					 b800 0 0 2 700 17 2
+					 b800 0 0 3 700 14 2
+					 b800 0 0 4 700 15 2
 
 					/* IDSEL 0x18 */
-					 b000 0 0 1 700 15 0
-					 b000 0 0 2 700 16 0
-					 b000 0 0 3 700 17 0
-					 b000 0 0 4 700 14 0>;
+					 b000 0 0 1 700 15 2
+					 b000 0 0 2 700 16 2
+					 b000 0 0 3 700 17 2
+					 b000 0 0 4 700 14 2>;
 			interrupt-parent = <700>;
 			interrupts = <42 8>;
 			bus-range = <0 0>;
-- 
1.4.1

RE: [PATCH] corrected PCI interrupt sense values to level low inmpc8349emds.dts

From: Liu Dave-r63238 <hidden>
Date: 2006-08-29 02:33:03

quoted hunk
Corrected PCI interrupt sense values to level low in=20
mpc8349emds.dts, per Leo's recommendation.
=20
Signed-off-by: Kim Phillips <redacted>
---
=20
applies on top of "[PATCH 4/4] Add MPC8349E MDS device tree=20
source file to arch/powerpc/boot/dts"
=20
=20
 arch/powerpc/boot/dts/mpc8349emds.dts |  112=20
+++++++++++++++++----------------
 1 files changed, 56 insertions(+), 56 deletions(-)
=20
diff --git a/arch/powerpc/boot/dts/mpc8349emds.dts=20
b/arch/powerpc/boot/dts/mpc8349emds.dts
index 7e4508b..0643db9 100644
--- a/arch/powerpc/boot/dts/mpc8349emds.dts
+++ b/arch/powerpc/boot/dts/mpc8349emds.dts
@@ -178,46 +178,46 @@
 			interrupt-map =3D <
=20
 					/* IDSEL 0x11 */
-					 8800 0 0 1 700 14 0
-					 8800 0 0 2 700 15 0
-					 8800 0 0 3 700 16 0
-					 8800 0 0 4 700 17 0
+					 8800 0 0 1 700 14 2
+					 8800 0 0 2 700 15 2
+					 8800 0 0 3 700 16 2
+					 8800 0 0 4 700 17 2
=20
 					/* IDSEL 0x12 */
-					 9000 0 0 1 700 16 0
-					 9000 0 0 2 700 17 0
-					 9000 0 0 3 700 14 0
-					 9000 0 0 4 700 15 0
+					 9000 0 0 1 700 16 2
+					 9000 0 0 2 700 17 2
+					 9000 0 0 3 700 14 2
+					 9000 0 0 4 700 15 2
=20
 					/* IDSEL 0x13 */
-					 9800 0 0 1 700 17 0
-					 9800 0 0 2 700 14 0
-					 9800 0 0 3 700 15 0
-					 9800 0 0 4 700 16 0
+					 9800 0 0 1 700 17 2
+					 9800 0 0 2 700 14 2
+					 9800 0 0 3 700 15 2
+					 9800 0 0 4 700 16 2
=20
 					/* IDSEL 0x15 */
-					 a800 0 0 1 700 14 0
-					 a800 0 0 2 700 15 0
-					 a800 0 0 3 700 16 0
-					 a800 0 0 4 700 17 0
+					 a800 0 0 1 700 14 2
+					 a800 0 0 2 700 15 2
+					 a800 0 0 3 700 16 2
+					 a800 0 0 4 700 17 2
=20
 					/* IDSEL 0x16 */
-					 b000 0 0 1 700 17 0
-					 b000 0 0 2 700 14 0
-					 b000 0 0 3 700 15 0
-					 b000 0 0 4 700 16 0
+					 b000 0 0 1 700 17 2
+					 b000 0 0 2 700 14 2
+					 b000 0 0 3 700 15 2
+					 b000 0 0 4 700 16 2
=20
 					/* IDSEL 0x17 */
-					 b800 0 0 1 700 16 0
-					 b800 0 0 2 700 17 0
-					 b800 0 0 3 700 14 0
-					 b800 0 0 4 700 15 0
+					 b800 0 0 1 700 16 2
+					 b800 0 0 2 700 17 2
+					 b800 0 0 3 700 14 2
+					 b800 0 0 4 700 15 2
=20
 					/* IDSEL 0x18 */
-					 b000 0 0 1 700 15 0
-					 b000 0 0 2 700 16 0
-					 b000 0 0 3 700 17 0
-					 b000 0 0 4 700 14 0>;
+					 b000 0 0 1 700 15 2
+					 b000 0 0 2 700 16 2
+					 b000 0 0 3 700 17 2
+					 b000 0 0 4 700 14 2>;
 			interrupt-parent =3D <700>;
 			interrupts =3D <42 8>;
 			bus-range =3D <0 0>;
@@ -238,46 +238,46 @@
 			interrupt-map =3D <
=20
 					/* IDSEL 0x11 */
-					 8800 0 0 1 700 14 0
-					 8800 0 0 2 700 15 0
-					 8800 0 0 3 700 16 0
-					 8800 0 0 4 700 17 0
+					 8800 0 0 1 700 14 2
+					 8800 0 0 2 700 15 2
+					 8800 0 0 3 700 16 2
+					 8800 0 0 4 700 17 2
=20
 					/* IDSEL 0x12 */
-					 9000 0 0 1 700 16 0
-					 9000 0 0 2 700 17 0
-					 9000 0 0 3 700 14 0
-					 9000 0 0 4 700 15 0
+					 9000 0 0 1 700 16 2
+					 9000 0 0 2 700 17 2
+					 9000 0 0 3 700 14 2
+					 9000 0 0 4 700 15 2
=20
 					/* IDSEL 0x13 */
-					 9800 0 0 1 700 17 0
-					 9800 0 0 2 700 14 0
-					 9800 0 0 3 700 15 0
-					 9800 0 0 4 700 16 0
+					 9800 0 0 1 700 17 2
+					 9800 0 0 2 700 14 2
+					 9800 0 0 3 700 15 2
+					 9800 0 0 4 700 16 2
=20
 					/* IDSEL 0x15 */
-					 a800 0 0 1 700 14 0
-					 a800 0 0 2 700 15 0
-					 a800 0 0 3 700 16 0
-					 a800 0 0 4 700 17 0
+					 a800 0 0 1 700 14 2
+					 a800 0 0 2 700 15 2
+					 a800 0 0 3 700 16 2
+					 a800 0 0 4 700 17 2
=20
 					/* IDSEL 0x16 */
-					 b000 0 0 1 700 17 0
-					 b000 0 0 2 700 14 0
-					 b000 0 0 3 700 15 0
-					 b000 0 0 4 700 16 0
+					 b000 0 0 1 700 17 2
+					 b000 0 0 2 700 14 2
+					 b000 0 0 3 700 15 2
+					 b000 0 0 4 700 16 2
=20
 					/* IDSEL 0x17 */
-					 b800 0 0 1 700 16 0
-					 b800 0 0 2 700 17 0
-					 b800 0 0 3 700 14 0
-					 b800 0 0 4 700 15 0
+					 b800 0 0 1 700 16 2
+					 b800 0 0 2 700 17 2
+					 b800 0 0 3 700 14 2
+					 b800 0 0 4 700 15 2
=20
 					/* IDSEL 0x18 */
-					 b000 0 0 1 700 15 0
-					 b000 0 0 2 700 16 0
-					 b000 0 0 3 700 17 0
-					 b000 0 0 4 700 14 0>;
+					 b000 0 0 1 700 15 2
+					 b000 0 0 2 700 16 2
+					 b000 0 0 3 700 17 2
+					 b000 0 0 4 700 14 2>;
 			interrupt-parent =3D <700>;
 			interrupts =3D <42 8>;
 			bus-range =3D <0 0>;
--
1.4.1
Where these IDSEL 0x15~0x18 come from on 8349EMDS board?
Please expain it.

-DAve

Re: [PATCH] corrected PCI interrupt sense values to level low inmpc8349emds.dts

From: Kumar Gala <hidden>
Date: 2006-08-30 13:30:06

Where these IDSEL 0x15~0x18 come from on 8349EMDS board?
Please expain it.
This is from the docs on the PMC-PCI expansion boards that state what  
IDSELs are used and how they are wired up.

- k

RE: [PATCH] corrected PCI interrupt sense values to level low inmpc8349emds.dts

From: Liu Dave-r63238 <hidden>
Date: 2006-08-31 02:29:33

<snip>
=20
quoted
Where these IDSEL 0x15~0x18 come from on 8349EMDS board?
Please expain it.
=20
This is from the docs on the PMC-PCI expansion boards that=20
state what IDSELs are used and how they are wired up.
Maybe you misunderstand me, I know that, the IDSEL is determined
by hardware design, I look up the schematic, only AD17/18/19 are
connected to PCI SLOT, that is IDSEL 0x11~0x13, I cannot find the
IDSEL 0x15~0x18 are impemented in the PIB. The IDSEL 0x15~0x18
actually are not existing.

-DAve

RE: [PATCH] corrected PCI interrupt sense values to level lowinmpc8349emds.dts

From: Li Yang-r58472 <hidden>
Date: 2006-08-31 03:27:53

<snip>
quoted
=20
quoted
Where these IDSEL 0x15~0x18 come from on 8349EMDS board?
Please expain it.
=20
This is from the docs on the PMC-PCI expansion boards that=20
state what=20
quoted
IDSELs are used and how they are wired up.
=20
Maybe you misunderstand me, I know that, the IDSEL is=20
determined by hardware design, I look up the schematic, only=20
AD17/18/19 are connected to PCI SLOT, that is IDSEL=20
0x11~0x13, I cannot find the IDSEL 0x15~0x18 are impemented=20
in the PIB. The IDSEL 0x15~0x18 actually are not existing.
These IDSELs are used by PCI Expansion Adaptor Board which has 4 PCI
slots for PCI1.

- Leo

RE: [PATCH] corrected PCI interrupt sense values to level lowinmpc8349emds.dts

From: Liu Dave-r63238 <hidden>
Date: 2006-08-31 04:46:21

quoted
=20
Maybe you misunderstand me, I know that, the IDSEL is determined by=20
hardware design, I look up the schematic, only
AD17/18/19 are connected to PCI SLOT, that is IDSEL 0x11~0x13, I=20
cannot find the IDSEL 0x15~0x18 are impemented in the PIB.=20
The IDSEL=20
quoted
0x15~0x18 actually are not existing.
=20
These IDSELs are used by PCI Expansion Adaptor Board which=20
has 4 PCI slots for PCI1.
Oh...The PCI expansion adaptor board. I see.
I have not ever seen the board.

-DAve

Re: [PATCH] corrected PCI interrupt sense values to level low in mpc8349emds.dts

From: Paul Mackerras <hidden>
Date: 2006-08-29 06:48:38

Kim Phillips writes:
Corrected PCI interrupt sense values to level low in
mpc8349emds.dts, per Leo's recommendation.
Please send an amended version of your original patch.

Thanks,
Paul.

Re: [PATCH] corrected PCI interrupt sense values to level low in mpc8349emds.dts

From: Sergei Shtylyov <hidden>
Date: 2006-08-29 15:26:24

Hello.

Kim Phillips wrote:
Corrected PCI interrupt sense values to level low in mpc8349emds.dts, per Leo's recommendation.
Signed-off-by: Kim Phillips <redacted>
---
applies on top of "[PATCH 4/4] Add MPC8349E MDS device tree source file to arch/powerpc/boot/dts"
quoted hunk
 arch/powerpc/boot/dts/mpc8349emds.dts |  112 +++++++++++++++++----------------
 1 files changed, 56 insertions(+), 56 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8349emds.dts b/arch/powerpc/boot/dts/mpc8349emds.dts
index 7e4508b..0643db9 100644
--- a/arch/powerpc/boot/dts/mpc8349emds.dts
+++ b/arch/powerpc/boot/dts/mpc8349emds.dts
@@ -178,46 +178,46 @@
 			interrupt-map = <
 
 					/* IDSEL 0x11 */
-					 8800 0 0 1 700 14 0
-					 8800 0 0 2 700 15 0
-					 8800 0 0 3 700 16 0
-					 8800 0 0 4 700 17 0
+					 8800 0 0 1 700 14 2
+					 8800 0 0 2 700 15 2
+					 8800 0 0 3 700 16 2
+					 8800 0 0 4 700 17 2
    Since when 2 means level low? 2 is level high, 1 is level low.

WBR, Sergei

Re: [PATCH] corrected PCI interrupt sense values to level low in mpc8349emds.dts

From: Sergei Shtylyov <hidden>
Date: 2006-08-29 15:34:27

Hello, I wrote:
quoted
Corrected PCI interrupt sense values to level low in mpc8349emds.dts, 
per Leo's recommendation.
quoted
Signed-off-by: Kim Phillips <redacted>
---
quoted
applies on top of "[PATCH 4/4] Add MPC8349E MDS device tree source 
file to arch/powerpc/boot/dts"
quoted
 arch/powerpc/boot/dts/mpc8349emds.dts |  112 
+++++++++++++++++----------------
 1 files changed, 56 insertions(+), 56 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8349emds.dts 
b/arch/powerpc/boot/dts/mpc8349emds.dts
index 7e4508b..0643db9 100644
--- a/arch/powerpc/boot/dts/mpc8349emds.dts
+++ b/arch/powerpc/boot/dts/mpc8349emds.dts
@@ -178,46 +178,46 @@
             interrupt-map = <
 
                     /* IDSEL 0x11 */
-                     8800 0 0 1 700 14 0
-                     8800 0 0 2 700 15 0
-                     8800 0 0 3 700 16 0
-                     8800 0 0 4 700 17 0
+                     8800 0 0 1 700 14 2
+                     8800 0 0 2 700 15 2
+                     8800 0 0 3 700 16 2
+                     8800 0 0 4 700 17 2
   Since when 2 means level low? 2 is level high, 1 is level low.
   Ah, this board uses IPIC, not OpenPIC. Anyway, this contradicts your own 
comment to the "ipic" device node stating that 8 is the right value for level low.

WBR, Sergei
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