RE: does Gianfar Ethernet Controller Version 1.1 support MARVELL 88E1111?

On Jun 8, 2006, at 12:51, Guo Jaffe wrote:

quoted

Hi Andy,

Thank you for your information. So the driver is not the issue, but
better to upgraded.

I will check the board once more. The PHY doesn't work because the
8bit bus between MAC and PHY is locked(TX_EN and RX_DV all 

disabled  

quoted

from the scope's view) and also you can't see any signals exist at  
the Magnetic side(nor LED signals). It seems that only 

MDC/MDIO and  

quoted

CLOCK reference pin works. The PHY's ID must be read from MDC/MDIO  
interface and Clocks are right showed on the scope.

But what error are you getting?  What are the symptoms of your  
problem?  The GMII interface (the 8-bit bus) is inconsequential to  
PHY configuration and management.  Only the MDC/MDIO bus is used.   
Therefore the PHY id should be quite readable.  What version 
of Linux  
are you using?  Please describe what the kernel prints out when you  
boot, and when you try to bring up the interface (assuming you don't  
do that at boot).

Andy

As you said, the MDIO bus looks like well. If the PHY address it is right,
You can read the PHY ID from PHY. What is the PHY ID you read?

Please check the hardware status

1) 8540 hardware reset configuration for GMII interface;
Make sure it is GMII interface.

2) MARVELL 88E1111 configuration and GMII interface connection.
You can reference the 8540 ref board.
 
3)TSEC and PHY power

4)The 125M reference clock---GTX_CLK125, This looks
well as you said.

5)The GTX_CLK for GMII transmit clock, and TX_CLK for MII transmit clock.
What speed ethernet does the TSEC  connect to? 1000Mbps or 100Mbps?

6) The RX_CLK for receive clock.

7)Of cause, need check the RX_DV and TX_EN to see if have some traffic.

-Dave

Hi Dave,

The PHY ID I read is MARVELL 88E1101(1410cc2)

Today I took the MPC 8540 off the board, and checked the two GMII phy chips 
alone. I manually pulled up the phys's RST pins when the cable was in 
position. But the link LED still can't light up. So it turned out not the 
driver's problem. 

The hardware configuration of 88E1111 is GMII to copper, Auto-Neg, 
advertise all capabilities, prefer Master.

The PHY's power is correct and clean. And for interface between TESC and 
PHY I think even TESC power is set for 3.3V environment it still can work 
with the 88e1111 whose VDD is 2.5V. Because the datasheet of 88e1111 says 
that input pins are 3.3V tolerant. Am I right?

regards,
Jaffe

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As you said, the MDIO bus looks like well. If the PHY address it is right,
You can read the PHY ID from PHY. What is the PHY ID you read?

Please check the hardware status

1) 8540 hardware reset configuration for GMII interface;
Make sure it is GMII interface.

2) MARVELL 88E1111 configuration and GMII interface connection.
You can reference the 8540 ref board.

3)TSEC and PHY power

4)The 125M reference clock---GTX_CLK125, This looks
well as you said.

5)The GTX_CLK for GMII transmit clock, and TX_CLK for MII transmit clock.
What speed ethernet does the TSEC  connect to? 1000Mbps or 100Mbps?

6) The RX_CLK for receive clock.

7)Of cause, need check the RX_DV and TX_EN to see if have some traffic.

-Dave