RE: [PATCH 2/10 v2] Add the MPC8641 HPCN platform files.
From: Zhang Wei-r63237 <hidden>
Date: 2006-06-12 04:20:21
Hi,
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+ /* Alloc mpic structure and per isu has 16 INT entries. */ + mpic1 = mpic_alloc(OpenPIC_PAddr, + MPIC_PRIMARY | MPIC_WANTS_RESET |MPIC_BIG_ENDIAN,quoted
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+ 16, MPC86xx_OPENPIC_IRQ_OFFSET, 0, 250, + mpc86xx_hpcn_openpic_initsenses, + sizeof(mpc86xx_hpcn_openpic_initsenses), + " MPIC "); + BUG_ON(mpic1 == NULL); + + /* 48 Internal Interrupts */ + mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200); + mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10400); + mpic_assign_isu(mpic1, 2, OpenPIC_PAddr + 0x10600);I haven't looked in detail at your memory map, but do you need separate ISUs ? They seem to be quite close together to me... Also, you should invent properties in the mpic node for some of those things, like big-endian (like apple does) indicating it's abig endianquoted
openpic, etc... If you manage to get close enough to spec & common usage, you might not even need your own init function at all in the future.OK. We'll work in that direction, but incrementally.quoted
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+ /* 16 External interrupts */ + mpic_assign_isu(mpic1, 3, OpenPIC_PAddr + 0x10000);That looks like you used ISUs in order to "re-order" them... why ?Heck if I know. We'll have to ask around some here... :-)
Re-ordering the interrupt is just fit for the practice from MPC85xx platform and legacy OpenPIC interrupts order. We put 16 i8259 interrupts to first 0-15 Position, 48 MPC86xx processor internel interrupts to 16-63 and 16 MPC86xx External interrupts to 64-79. Thanks for your feedback! Best Regards, ZHANG WEI