RE: [PATCH 2/10 v2] Add the MPC8641 HPCN platform files.

2 messages, 2 authors, 2006-06-12 · open the first message on its own page

RE: [PATCH 2/10 v2] Add the MPC8641 HPCN platform files.

From: Zhang Wei-r63237 <hidden>
Date: 2006-06-12 04:20:21

Hi, 
quoted
quoted
+	/* Alloc mpic structure and per isu has 16 INT entries. */
+	mpic1 = mpic_alloc(OpenPIC_PAddr,
+			MPIC_PRIMARY | MPIC_WANTS_RESET | 
MPIC_BIG_ENDIAN,
quoted
quoted
+			16, MPC86xx_OPENPIC_IRQ_OFFSET, 0, 250,
+			mpc86xx_hpcn_openpic_initsenses,
+			sizeof(mpc86xx_hpcn_openpic_initsenses),
+			" MPIC     ");
+	BUG_ON(mpic1 == NULL);
+
+	/* 48 Internal Interrupts */
+	mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200);
+	mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10400);
+	mpic_assign_isu(mpic1, 2, OpenPIC_PAddr + 0x10600);
I haven't looked in detail at your memory map, but do you need 
separate ISUs ? They seem to be quite close together to me... Also, 
you should invent properties in the mpic node for some of those 
things, like big-endian (like apple does) indicating it's a 
big endian 
quoted
openpic, etc... If you manage to get close enough to spec & common 
usage, you might not even need your own init function at all in the 
future.
OK.  We'll work in that direction, but incrementally.
quoted
quoted
+	/* 16 External interrupts */
+	mpic_assign_isu(mpic1, 3, OpenPIC_PAddr + 0x10000);
That looks like you used ISUs in order to "re-order" them... why ?
Heck if I know.  We'll have to ask around some here... :-)
Re-ordering the interrupt is just fit for the practice from MPC85xx platform 
and legacy OpenPIC interrupts order. We put 16 i8259 interrupts to first 0-15
Position, 48 MPC86xx processor internel interrupts to 16-63 and 16 MPC86xx 
External interrupts to 64-79.

Thanks for your feedback!

Best Regards,
ZHANG WEI

RE: [PATCH 2/10 v2] Add the MPC8641 HPCN platform files.

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2006-06-12 04:22:54

Re-ordering the interrupt is just fit for the practice from MPC85xx platform 
and legacy OpenPIC interrupts order. We put 16 i8259 interrupts to first 0-15
Position, 48 MPC86xx processor internel interrupts to 16-63 and 16 MPC86xx 
External interrupts to 64-79.
I'd rather keep the openpic sources in a single row then... with the new
stuff that I'm trying to finish in time for 2.6.18 (well... maybe),
re-numbering will be handled for you by the core and 8259 will always
have 0...15 reserved.

Ben.
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help