[PATCH 4/10 v2] Guard L3CR references with CPU_FTR_L3CR.

Subsystems: linux for powerpc (32-bit and 64-bit), the rest

STALE7372d

2 messages, 2 authors, 2006-06-09 · open the first message on its own page

[PATCH 4/10 v2] Guard L3CR references with CPU_FTR_L3CR.

From: Jon Loeliger <hidden>
Date: 2006-06-08 22:02:34 

Signed-off-by: Jon Loeliger <redacted>

---

 arch/powerpc/kernel/cpu_setup_6xx.S |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)


diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index 55ed771..365381f 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -210,9 +210,11 @@ setup_745x_specifics:
 	 * the firmware. If any, we disable NAP capability as
 	 * it's known to be bogus on rev 2.1 and earlier
 	 */
+BEGIN_FTR_SECTION
 	mfspr	r11,SPRN_L3CR
 	andis.	r11,r11,L3CR_L3E@h
 	beq	1f
+END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
 	lwz	r6,CPU_SPEC_FEATURES(r5)
 	andi.	r0,r6,CPU_FTR_L3_DISABLE_NAP
 	beq	1f

Re: [PATCH 4/10 v2] Guard L3CR references with CPU_FTR_L3CR.

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2006-06-09 04:18:10 

On Thu, 2006-06-08 at 16:58 -0500, Jon Loeliger wrote:
Signed-off-by: Jon Loeliger <redacted>
Beware about this one... the CPU setup code might run before the feature
fixup in the future... you should probably do a separate setup function
for your core or go read the feature bit directly in the structure
rather than relying on the fixup mecanism.
quoted hunk
---

 arch/powerpc/kernel/cpu_setup_6xx.S |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)


diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index 55ed771..365381f 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -210,9 +210,11 @@ setup_745x_specifics:
 	 * the firmware. If any, we disable NAP capability as
 	 * it's known to be bogus on rev 2.1 and earlier
 	 */
+BEGIN_FTR_SECTION
 	mfspr	r11,SPRN_L3CR
 	andis.	r11,r11,L3CR_L3E@h
 	beq	1f
+END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
 	lwz	r6,CPU_SPEC_FEATURES(r5)
 	andi.	r0,r6,CPU_FTR_L3_DISABLE_NAP
 	beq	1f


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