eldk-3.1.1 mpc823 SCC3 CTS/CD

Hello denx:

I found one bug when SCC3 as UART, my cpu is mpc823.
cts/cd config as:
	CTS PC5
	CD  PC4

your ELDK-3.1.1 linux-2.4.25 uart.c set pcpar,pcso, pcdir:
	immap->im_ioport.iop_pcpar &= ~iobits;
	immap->im_ioport.iop_pcso |=  iobits;
	immap->im_ioport.iop_pcdir &= ~iobits;
but MPC823UM tell me CD3 and CTS3 is bit6 and bit7 on PCSO register, so I modify:
	fix_pcso = iobits;
	#if defined(CONFIG_UART_CTS_CONTROL_SCC3)
  		fix_pcso &=~(1 << (15 - CONFIG_CTS3_PIN));
		fix_pcso |= 0x0100;
	#endif
	#if defined(CONFIG_UART_CD_CONTROL_SCC3)
 		fix_pcso &=~(1 << (15 - CONFIG_CD3_PIN));
		fix_pcso |= 0x0200;
	#endif

	immap->im_ioport.iop_pcpar &= ~iobits;
	immap->im_ioport.iop_pcso |=  fix_pcso;
	immap->im_ioport.iop_pcdir &= ~iobits;

My board have success communication to moderm with SCC3 hard flow control.

        debora liu
        deboraliu@tom.com
          2005-12-12