[RESEND][PATCH] ppc32: Fix MPC83xx IPIC external interrupt pending register offset
From: Kumar Gala <hidden>
Date: 2005-06-26 14:15:57
Also in:
lkml
Subsystem:
the rest · Maintainer:
Linus Torvalds
(I think this got lost by linus in the shuffle) The pending registers for IRQ1-IRQ7 were pointing to the interrupt pending register instead of the external one. Signed-off-by: Tony Li <redacted> Signed-off-by: Kumar Gala <redacted> --- commit 7ada9b1e61d5af4c75f32bfc1f7aabca435024ed tree 44de45c386a0f22584344494bfe1eb453dffa16c parent e3f1d172ca1cfd1ac2dd907c31fb2521bfe21689 author Kumar K. Gala [off-list ref] Thu, 23 Jun 2005 22:49:39 -0500 committer Kumar K. Gala [off-list ref] Thu, 23 Jun 2005 22:49:39 -0500 arch/ppc/syslib/ipic.c | 14 +++++++------- 1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/ppc/syslib/ipic.c b/arch/ppc/syslib/ipic.c
--- a/arch/ppc/syslib/ipic.c
+++ b/arch/ppc/syslib/ipic.c@@ -79,7 +79,7 @@ static struct ipic_info ipic_info[] = { .prio_mask = 7, }, [17] = { - .pend = IPIC_SIPNR_H, + .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_A, .force = IPIC_SEFCR,
@@ -87,7 +87,7 @@ static struct ipic_info ipic_info[] = { .prio_mask = 5, }, [18] = { - .pend = IPIC_SIPNR_H, + .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_A, .force = IPIC_SEFCR,
@@ -95,7 +95,7 @@ static struct ipic_info ipic_info[] = { .prio_mask = 6, }, [19] = { - .pend = IPIC_SIPNR_H, + .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_A, .force = IPIC_SEFCR,
@@ -103,7 +103,7 @@ static struct ipic_info ipic_info[] = { .prio_mask = 7, }, [20] = { - .pend = IPIC_SIPNR_H, + .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_B, .force = IPIC_SEFCR,
@@ -111,7 +111,7 @@ static struct ipic_info ipic_info[] = { .prio_mask = 4, }, [21] = { - .pend = IPIC_SIPNR_H, + .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_B, .force = IPIC_SEFCR,
@@ -119,7 +119,7 @@ static struct ipic_info ipic_info[] = { .prio_mask = 5, }, [22] = { - .pend = IPIC_SIPNR_H, + .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_B, .force = IPIC_SEFCR,
@@ -127,7 +127,7 @@ static struct ipic_info ipic_info[] = { .prio_mask = 6, }, [23] = { - .pend = IPIC_SIPNR_H, + .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_B, .force = IPIC_SEFCR,