RE: SDRAM mirroring problem

Oops, I had my cheap ASCII art mislabled on the addresses (I had it
labeled for 64MB total instead of 128MB). The proper labeling (with an
enhancement to identify the problem address) would be:

+----+----++----+----+ 00000000
|byt0|byt1||byt2|byt3|
|    |    ||    |    | 03FFFFFF
|    |    ||    |    | 04000000
|    |    ||    |    |
+----+----++----+----+ 07FFFFFF
   chip0      chip1

Your problem obviously is with the most significant address line since
the address space is replicated at the 1/2 spot (04000000). Just to be
paranoid, did you check if location 00000000 is replicated anywhere else
like 02000000, 01000000, 00800000...? Is it only the most significant
address line?

You could have a hardware problem where the most significant address
line is either always high or always low. You will have to probe your
board with an oscilloscope or logic analyzer to verify or eliminate
this.

The other option is a misconfiguration of the memory controller such
that the memory controller is multiplexing the address lines improperly.
I'm afraid I'm not very familiar with the 8xx memory controller and
don't have the time or knowledge to review your set up so I cannot help
you directly. You will need to read and understand the manuals (both
processor and SDRAM) and looking at example code (both in the manuals
and other examples in u-boot or elsewhere). Based on questions I've seen
in the u-boot email list, the 8xx memory controller is quite complex to
set up properly, making this a pretty high probability.

Some reference web sites:
  U-Boot (lots of source code examples):
    http://sourceforge.net/projects/u-boot/
  The DENX U-Boot and Linux Guide (DULG) for TQM8xxL:
    http://www.denx.de/twiki/bin/view/DULG/Manual

gvb

-----Original Message-----
From: Anil Giri [mailto:anil@india.tejasnetworks.com]
Sent: Tuesday, November 18, 2003 6:02 AM
Subject: RE: SDRAM mirroring problem

Quoting "VanBaren, Gerald (AGRE)"
[off-list ref]:

quoted

Well, an uninformed response may be better than no response??? Here
goes...

I don't understand how your hardware is set up.

a) Are you connecting the two 64Mbyte chips in parallel as a 32 bit
wide data bus (this is implied by your use of one chip select). This
is contradicted by your statement "My problem is that when i write
some word in first RAM chip is mirrored in the other RAM chip.And
Effectivly

Sorry for the goof up, basically whatever i write to 0th (0x0) memory
location in getting replicated to 64th MB (0x4000000) location

quoted

i m able to use only 64 MB of RAM." which implies that the two chips
are expected to be sequential in memory address space.

b) If you are connecting the two chips up sequentially as 64MB by 16
bits wide on the data bus, you need separate chip selects with the
first one providing the first 64MBytes of decoded address space and
the second one the second 64MBytes.

Cheap ASCII art:

a) +----+----++----+----+ 00000000
   |byt0|byt1||byt2|byt3|
   |    |    ||    |    |
   |    |    ||    |    |
   +----+----++----+----+ 03FFFFFF
      chip0      chip1

The ram chips are connected in above fashion with single chip select.

quoted

b) +----+----+ 00000000
   |byt0|byt1|
   |byt2|byt3| chip0
   |    |    |
   +----+----+ 01FFFFFF
   +----+----+ 02000000
   |    |    |
   |    |    | chip1
   |    |    |
   +----+----+ 03FFFFFFF

quoted

-----Original Message-----
From: Anil Giri [mailto:anil@india.tejasnetworks.com]
Sent: Monday, November 17, 2003 3:54 AM
Subject: SDRAM mirroring problem

  My board uses SAMSUNG K4S511632M SDRAM in 8M * 16 bit * 4 banks
configuration (13 rows & 10 columns).Two such chips are used to
get 128 MB and uses CS1 for chip select.My board uses MPC852T
processor.

MPC to SDRAM configuration is as follows:
======================
A29 :A0
A28 :A1
A27 :A2
A26 :A3
A25 :A4
A24 :A5
A23 :A6
A22 :A7
A21 :A8
A20 :A9
GPL_A0 : A10
A18 :A11
A17 :A12

A6 :BA0
A5 :BA1
GPL_A3 :CAS
GPL_A2 :RAS
GPL_A5 :WE
=====================
My problem is that when i write some word in first RAM chip is
mirrored in the other RAM chip.And Effectivly i m able to use
only 64 MB of RAM. What could be the problem??? Following SDRAM
settings are used

IMMR:0xff000000
OR1: 0xf8000e00
BR1: 0x00000081
MSTAT:0x00000400
MAMR: 0x80a06114
MAR: 0x88
MCR:0x80002105

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