In message [off-list ref] you wrote:
But this is not enough. It looks like the CHSTP bit in the DER (Debug Enable
Regsiter) is set preventing the HRESET_N sequence from the CPU. This DER is
not a normal special register. Do you have an example how I can clear it?
The DER should be set by your formware. Fix this!
And the DER _is_ a normal special register (# 149).
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd@denx.de
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Hi Wolfgang,
The DER should be set by your formware. Fix this!
I cleared CFG_DER in ppcboot to clear the CHSTP bit. After that I needed to
map in the br0 range and to make the asm's volatile and set the input/output
parameters of the asm to get the HRESET_N pulse. So this is the version
which works (on a MPC823e) in the context of the Linux kernel:
/* Get base address mapped by BR0/OR0 and map it in */
val = ((immap_t *)IMAP_ADDR)->im_memctl.memc_br0 & 0xFFFF8000;
val = (int) ioremap( retval, 0x4000 );
cli();
/* Enable CheckStop Reset */
((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr |= 0x00000080;
/* Invalidate BR0 mapping */
((immap_t *)IMAP_ADDR)->im_memctl.memc_br0 &= ~0x1;
/* Clear ME in MSR and cause CheckStop */
__asm__ volatile("mfmsr %0" : "=r" (msr) );
msr &= ~0x1000;
__asm__ volatile("mtmsr %0": : "r" (msr) );
val = * (unsigned char *) val;
printk("Restart failed\n");
while(1)
;
Cheers,
Bart
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