8260 + L2 Cache

2 messages, 2 authors, 2002-02-01 · open the first message on its own page

8260 + L2 Cache

From: Kevin Fry <hidden>
Date: 2002-02-01 01:11:14

Hello all, a few questions if I may..

We have a custom board with an MPC8260 and 1MB of L2
cache. The cache is controlled (flushed, invalidated, inhibited,
and locked) by 4 signals which are tied to GPIOs on the 8260.
We are booting with PPCBoot 1.1.2 and are using version 2.4.17
of the Linux kernel.

At boot time the L2 inhibit signal is asserted and remains so
until we toggle a bit in the Port D register. Doing so manually
results in Linux crashing (no big surprise). So the question is:
where in Linux should we be enabling the cache? At the same
time the L1 cache is enabled? Or should it be done before
Linux boots? I would think it should be done in Linux since that
is where the data cache is turned on, but I could be wrong.

Any help is greatly appreciated.

Thanks!
Kevin Fry


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8260ADS Startup

From: Bruno Coudoin <hidden>
Date: 2002-02-01 08:57:43

Hi,

I have a Motorola MPC8260ADS Board with a CopRaven JTag cable.
I would like to load PPC Boot on our flash board but I can't find the
process to achieve that.

Has anybody already done this and could give a desciption of how to do
this.

Thanks in advance,
Bruno Coudoin.


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