64 bit memory access - again ...

2 messages, 2 authors, 2001-12-03 · open the first message on its own page

64 bit memory access - again ...

From: Shie Erlich <hidden>
Date: 2001-12-03 11:14:43

( i know this has been talked about before, but i couldn't get
  a complete answer from reading the posts, so ... )

i'm porting linux to a powerPC750 and have the following problem:
we have a piece of hardware whose memory region can only be
written or read to using 64bit memory access.
(i know it's a bad design, but as usual, it's not up to me ;-)

as far as i know, there are 2 ways to do a 64bit access on a 750:
1) use the FPU and do a floating point access
2) something about using a cache line and flushing it (don't know
   anymore about this one)

i also know that floating point in the kernel is a big NO, but if no other
choice is found, i'll have to do it. my questions are:

a) what is the recommended way of doing a 64bit access in the linux kernel ?
b) if the fpu is the way to go, what do i need to do so that the kernel does
not
    trap my floating point access ? details here would be greatly
appriciated ;-)


any help anyone can offer will be great,

                            thanks
 			shie erlich


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Re: 64 bit memory access - again ...

From: Dan Malek <hidden>
Date: 2001-12-03 17:01:44

Shie Erlich wrote:

i also know that floating point in the kernel is a big NO, but if no other
choice is found, i'll have to do it. my questions are:
If possible, I would mmap() the device from user space and perform
the access there.
a) what is the recommended way of doing a 64bit access in the linux kernel ?
I would first try to do it with a cache line burst access.  Put it in
copyback mode, zero the line, write the line, flush the line, invalidate
the line.
b) if the fpu is the way to go, what do i need to do so that the kernel does
not
    trap my floating point access ?
You can't trap and emulate, that defeats the purpose.  The biggest challenge
when using floating point in the kernel is context switching the FPU.
I would probably force the kernel to always context switch the FPU (as
it does on SMP) so you would always have a clean context to use in
the kernel.  I would then disable interrupts (to avoid other FPU context
problems), enable the FPU, perform the access, ensure the context is
reloaded for the switched-in thread, disable the FPU, enable interrupts.

Any system performance gains you thought you may have by using 64-bit
I/O are likely to be significantly reduced by the amount of software
overhead needed to manage this.

Depending upon what you are using for a bridge/memory controller you
may have a DMA controller that could perform this access as well.


	-- Dan


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